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gpu: nvgpu: PS3.5 VFE VAR and EQU changes

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Changes between GV100 and Turing VFE pstate tables-
1. PS3.5 ucode packs two sets of vfe boardobjgrp - primary and
   rppm in new struct whose name is appended with suffix pack. The
   rppm (runtime power and performance model) set is needed to
   achieve Max Q. The rppm set is not relevant to Automotive SKUs and
   entries are set to 'disabled'. But the turing ucode in R400 uses
   the 'pack' struct to calculate supersurface offset and size of
   vfe_var/equ boardobjgrp.
2. Header size has been increased to add RPPM related VFE variable
   and equation count.

VFE Variables boardobjgrp specific changes-
1. New var type 'single caller specified' had been added to represent
   generic type of variable which is not associated with voltage or
   frequency but identified by a Unique ID.
2. The frequency variable type can be associated with a clock domain,
   if the clock domain index availability flag is set.

VFE Equations boardobjgrp specific changes-
1. New entry type 'scalar' had been added to allow scaling equation
   pointed by 'equ_idx_to_scale'.
2. More ouput types are added to represent the equation evaluation
   results.

We modify the nvgpu Turing driver and GV100 ucode to adapt to these
changes.
This patch also fixes some MISRA defects in touched files.

JIRA NVGPU-1178

Change-Id: I90910ac8dccf0b98a588cbc442dc11ac4fbd2e61
Signed-off-by: tkudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1928999
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaikundanathan S <vaikuns@nvidia.com>
Tested-by: Vaikundanathan S <vaikuns@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
tkudav
2018-10-16 19:52:36 +05:30
committed by mobile promotions
parent 49d3881f36
commit c6e021589e
10 changed files with 481 additions and 148 deletions
Download Patch File Download Diff File Expand all files Collapse all files

42
drivers/gpu/nvgpu/include/nvgpu/bios.h
View File

@@ -358,8 +358,13 @@ struct vbios_vfe_3x_header_struct {
u8 vfe_equ_entry_size;
u8 vfe_equ_entry_count;
u8 polling_periodms;
u8 vfe_var_rppm_entry_count;
u8 vfe_equ_rppm_entry_count;
} __packed;
#define VBIOS_VFE_3X_HEADER_SIZE_07 0x07U
#define VBIOS_VFE_3X_HEADER_SIZE_09 0x09U
#define VBIOS_VFE_3X_VAR_ENTRY_SIZE_11 0x11U
#define VBIOS_VFE_3X_VAR_ENTRY_SIZE_19 0x19U
struct vbios_vfe_3x_var_entry_struct {
@@ -379,6 +384,15 @@ struct vbios_vfe_3x_var_entry_struct {
#define VBIOS_VFE_3X_VAR_ENTRY_TYPE_SINGLE_SENSED_FUSE 0x04U
#define VBIOS_VFE_3X_VAR_ENTRY_TYPE_DERIVED_PRODUCT 0x05U
#define VBIOS_VFE_3X_VAR_ENTRY_TYPE_DERIVED_SUM 0x06U
#define VBIOS_VFE_3X_VAR_ENTRY_TYPE_SINGLE_CALLER_SPECIFIED 0x07U
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IS_AVAILABLE_MASK 0x1U
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IS_AVAILABLE_SHIFT 0
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IS_AVAILABLE_NO 0x0U
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IS_AVAILABLE_YES 0x1U
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IDX_MASK 0xFF00U
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IDX_SHIFT 8
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_SSTEMP_TH_CH_IDX_MASK 0xFFU
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_SSTEMP_TH_CH_IDX_SHIFT 0U
@@ -418,6 +432,9 @@ struct vbios_vfe_3x_var_entry_struct {
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_DSUM_VFE_VAR_IDX_1_MASK 0xFF00U
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_DSUM_VFE_VAR_IDX_1_SHIFT 8U
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_SINGLE_CALLER_SPECIFIED_UID_MASK 0xFFU
#define VBIOS_VFE_3X_VAR_ENTRY_PAR0_SINGLE_CALLER_SPECIFIED_UID_SHIFT 0U
#define VBIOS_VFE_3X_VAR_ENTRY_PAR1_SSFUSE_DEFAULT_VAL_MASK 0xFFFFFFFFU
#define VBIOS_VFE_3X_VAR_ENTRY_PAR1_SSFUSE_DEFAULT_VAL_SHIFT 0U
@@ -449,6 +466,7 @@ struct vbios_vfe_3x_equ_entry_struct {
#define VBIOS_VFE_3X_EQU_ENTRY_TYPE_COMPARE 0x03U
#define VBIOS_VFE_3X_EQU_ENTRY_TYPE_QUADRATIC_FXP 0x04U
#define VBIOS_VFE_3X_EQU_ENTRY_TYPE_MINMAX_FXP 0x05U
#define VBIOS_VFE_3X_EQU_ENTRY_TYPE_EQUATION_SCALAR 0x06U
#define VBIOS_VFE_3X_EQU_ENTRY_IDX_INVALID 0xFFU
@@ -469,6 +487,9 @@ struct vbios_vfe_3x_equ_entry_struct {
#define VBIOS_VFE_3X_EQU_ENTRY_PAR0_COMPARE_CRIT_MASK 0xFFFFFFFFU
#define VBIOS_VFE_3X_EQU_ENTRY_PAR0_COMPARE_CRIT_SHIFT 0U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR0_EQUATION_SCALAR_IDX_TO_SCALE_MASK 0xFFU
#define VBIOS_VFE_3X_EQU_ENTRY_PAR0_EQUATION_SCALAR_IDX_TO_SCALE_SHIFT 0x00U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR1_QUADRATIC_C1_MASK 0xFFFFFFFFU
#define VBIOS_VFE_3X_EQU_ENTRY_PAR1_QUADRATIC_C1_SHIFT 0U
@@ -484,13 +505,20 @@ struct vbios_vfe_3x_equ_entry_struct {
#define VBIOS_VFE_3X_EQU_ENTRY_PAR1_COMPARE_FUNCTION_GREATER_EQ 0x00000001U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR1_COMPARE_FUNCTION_GREATER 0x00000002U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_MASK 0xFU
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_SHIFT 0U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_UNITLESS 0x0U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_FREQ_MHZ 0x1U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VOLT_UV 0x2U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VF_GAIN 0x3U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VOLT_DELTA_UV 0x4U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_MASK 0xFU
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_SHIFT 0U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_UNITLESS 0x0U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_FREQ_MHZ 0x1U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VOLT_UV 0x2U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VF_GAIN 0x3U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VOLT_DELTA_UV 0x4U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_RSVD 0x5U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_WORK_TYPE 0x6U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_UTIL_RATIO 0x7U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_WORK_FB_NORM 0x8U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_POWER_MW 0x9U
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_PWR_OVER_UTIL_SLOPE 0xAU
#define VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VIN_CODE 0xBU
#define NV_VFIELD_DESC_SIZE_BYTE 0x00000000U
#define NV_VFIELD_DESC_SIZE_WORD 0x00000001U

28
drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h
View File

@@ -353,6 +353,34 @@ do { \
(u32)offsetof(struct nv_pmu_super_surface, eng.class##_grp_get_status), \
NV_PMU_RPC_ID_##ENG##_BOARD_OBJ_GRP_CMD)
#define BOARDOBJGRP_PMU_CMD_GRP_SET_PACK_CONSTRUCT(g, pboardobjgrp, eng, ENG, \
class, CLASS) \
g->ops.pmu_ver.boardobj.boardobjgrp_pmucmd_construct_impl( \
g, /* pgpu */ \
pboardobjgrp, /* pboardobjgrp */ \
&((pboardobjgrp)->pmu.set), /* pcmd */ \
NV_PMU_##ENG##_CMD_ID_BOARDOBJ_GRP_SET, /* id */ \
NV_PMU_##ENG##_MSG_ID_BOARDOBJ_GRP_SET, /* msgid */ \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobjgrp_set_header_aligned), \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobj_set_union_aligned), \
(u32)sizeof(struct nv_pmu_##eng##_##class##_boardobj_grp_set_pack), \
(u32)offsetof(struct nv_pmu_super_surface, eng.class##_grp_set), \
NV_PMU_RPC_ID_##ENG##_BOARD_OBJ_GRP_CMD)
#define BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_PACK_CONSTRUCT(g, pboardobjgrp, \
eng, ENG, class, CLASS) \
g->ops.pmu_ver.boardobj.boardobjgrp_pmucmd_construct_impl( \
g, /* pGpu */ \
pboardobjgrp, /* pBoardObjGrp */ \
&((pboardobjgrp)->pmu.getstatus), /* pCmd */ \
NV_PMU_##ENG##_CMD_ID_BOARDOBJ_GRP_GET_STATUS, /* id */ \
NV_PMU_##ENG##_MSG_ID_BOARDOBJ_GRP_GET_STATUS, /* msgid */ \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobjgrp_get_status_header_aligned), \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobj_get_status_union_aligned), \
(u32)sizeof(struct nv_pmu_##eng##_##class##_boardobj_grp_get_status_pack), \
(u32)offsetof(struct nv_pmu_super_surface, eng.class##_grp_get_status), \
NV_PMU_RPC_ID_##ENG##_BOARD_OBJ_GRP_CMD)
/* ------------------------ Function Prototypes ----------------------------- */
/* Constructor and destructor */
int boardobjgrp_construct_super(struct gk20a *g,

1
drivers/gpu/nvgpu/include/nvgpu/pmuif/ctrlperf.h
View File

@@ -100,6 +100,7 @@ struct ctrl_perf_vfe_var_single_sensed_fuse_ver_vfield_info {
struct ctrl_perf_vfe_var_single_sensed_fuse_info fuse;
u8 ver_expected;
bool b_ver_check;
bool b_ver_check_ignore;
bool b_use_default_on_ver_check_fail;
u8 v_field_id_ver;
};

11
drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmu_super_surf_if.h
View File

@@ -63,13 +63,10 @@ struct nv_pmu_super_surface {
u8 clk_rsvd[0x4660];
} clk;
struct {
struct nv_pmu_perf_vfe_equ_boardobj_grp_set vfe_equ_grp_set;
struct nv_pmu_perf_vfe_var_boardobj_grp_set dummy1;
u8 rsvd1[0x200];
struct nv_pmu_perf_vfe_var_boardobj_grp_set vfe_var_grp_set;
struct nv_pmu_perf_vfe_var_boardobj_grp_set dummy2;
u8 rsvd2[0x400];
struct nv_pmu_perf_vfe_var_boardobj_grp_get_status vfe_var_grp_get_status;
struct nv_pmu_perf_vfe_equ_boardobj_grp_set_pack vfe_equ_grp_set;
struct nv_pmu_perf_vfe_var_boardobj_grp_set_pack vfe_var_grp_set;
struct nv_pmu_perf_vfe_var_boardobj_grp_get_status_pack vfe_var_grp_get_status;
u8 perf_rsvd[0x40790];
u8 perfcf_rsvd[0x1eb0];
} perf;

42
drivers/gpu/nvgpu/include/nvgpu/pmuif/gpmuifperfvfe.h
View File

@@ -30,9 +30,15 @@
#define NV_PMU_PERF_RPC_VFE_EQU_EVAL_VAR_COUNT_MAX 2U
#define NV_PMU_PERF_RPC_VFE_EQU_MONITOR_COUNT_MAX 16U
union nv_pmu_perf_vfe_var_type_data {
u8 uid;
u8 clk_domain_idx;
};
struct nv_pmu_perf_vfe_var_value {
u8 var_type;
u8 reserved[3];
union nv_pmu_perf_vfe_var_type_data var_type_data;
u8 reserved[2];
u32 var_value;
};
@@ -41,6 +47,12 @@ union nv_pmu_perf_vfe_equ_result {
u32 voltu_v;
u32 vf_gain;
int volt_deltau_v;
u32 work_type;
u32 util_ratio;
u32 work_fb_norm;
u32 power_mw;
u32 pwr_over_util_slope;
int vin_code;
};
struct nv_pmu_perf_rpc_vfe_equ_eval {
@@ -80,6 +92,11 @@ union nv_pmu_perf_vfe_var_boardobj_get_status_union {
NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE_E32(perf, vfe_var);
struct nv_pmu_perf_vfe_var_boardobj_grp_get_status_pack {
struct nv_pmu_perf_vfe_var_boardobj_grp_get_status pri;
struct nv_pmu_perf_vfe_var_boardobj_grp_get_status rppm;
};
struct nv_pmu_vfe_var {
struct nv_pmu_boardobj super;
u32 out_range_min;
@@ -112,6 +129,12 @@ struct nv_pmu_vfe_var_single {
struct nv_pmu_vfe_var_single_frequency {
struct nv_pmu_vfe_var_single super;
u8 clk_domain_idx;
};
struct nv_pmu_vfe_var_single_caller_specified {
struct nv_pmu_vfe_var_single super;
u8 uid;
};
struct nv_pmu_vfe_var_single_sensed {
@@ -156,10 +179,16 @@ union nv_pmu_perf_vfe_var_boardobj_set_union {
struct nv_pmu_vfe_var_single_sensed_fuse var_single_sensed_fuse;
struct nv_pmu_vfe_var_single_sensed_temp var_single_sensed_temp;
struct nv_pmu_vfe_var_single_voltage var_single_voltage;
struct nv_pmu_vfe_var_single_caller_specified var_single_caller_specified;
};
NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(perf, vfe_var);
struct nv_pmu_perf_vfe_var_boardobj_grp_set_pack {
struct nv_pmu_perf_vfe_var_boardobj_grp_set pri;
struct nv_pmu_perf_vfe_var_boardobj_grp_set rppm;
};
struct nv_pmu_vfe_equ {
struct nv_pmu_boardobj super;
u8 var_idx;
@@ -189,6 +218,11 @@ struct nv_pmu_vfe_equ_quadratic {
u32 coeffs[CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT];
};
struct nv_pmu_vfe_equ_scalar {
struct nv_pmu_vfe_equ super;
u8 equ_idx_to_scale;
};
struct nv_pmu_perf_vfe_equ_boardobjgrp_set_header {
struct nv_pmu_boardobjgrp_e255 super;
};
@@ -199,8 +233,14 @@ union nv_pmu_perf_vfe_equ_boardobj_set_union {
struct nv_pmu_vfe_equ_compare equ_comapre;
struct nv_pmu_vfe_equ_minmax equ_minmax;
struct nv_pmu_vfe_equ_quadratic equ_quadratic;
struct nv_pmu_vfe_equ_scalar equ_scalar;
};
NV_PMU_BOARDOBJ_GRP_SET_MAKE_E255(perf, vfe_equ);
struct nv_pmu_perf_vfe_equ_boardobj_grp_set_pack {
struct nv_pmu_perf_vfe_equ_boardobj_grp_set pri;
struct nv_pmu_perf_vfe_var_boardobj_grp_set rppm;
};
#endif /* NVGPU_PMUIF_GPMUIFPERFVFE_H*/

8
drivers/gpu/nvgpu/pmu_perf/pmu_perf.h
View File

@@ -40,6 +40,7 @@
#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE 0x07U
#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP 0x08U
#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE 0x09U
#define CTRL_PERF_VFE_VAR_TYPE_SINGLE_CALLER_SPECIFIED 0x0AU
#define CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_NONE 0x00U
#define CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_VALUE 0x01U
@@ -50,12 +51,19 @@
#define CTRL_PERF_VFE_EQU_TYPE_COMPARE 0x01U
#define CTRL_PERF_VFE_EQU_TYPE_MINMAX 0x02U
#define CTRL_PERF_VFE_EQU_TYPE_QUADRATIC 0x03U
#define CTRL_PERF_VFE_EQU_TYPE_SCALAR 0x04U
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_UNITLESS 0x00U
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_FREQ_MHZ 0x01U
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VOLT_UV 0x02U
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VF_GAIN 0x03U
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VOLT_DELTA_UV 0x04U
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_WORK_TYPE 0x06U
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_UTIL_RATIO 0x07U
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_WORK_FB_NORM 0x08U
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_POWER_MW 0x09U
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_PWR_OVER_UTIL_SLOPE 0x0AU
#define CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VIN_CODE 0x0BU
#define CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT 0x03U

210
drivers/gpu/nvgpu/pmu_perf/vfe_equ.c
View File

@@ -35,7 +35,7 @@ static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs);
static int devinit_get_vfe_equ_table(struct gk20a *g,
struct vfe_equs *pvfeequobjs);
static int _vfe_equs_pmudatainit(struct gk20a *g,
static int vfe_equs_pmudatainit(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu)
{
@@ -52,13 +52,13 @@ done:
return status;
}
static int _vfe_equs_pmudata_instget(struct gk20a *g,
static int vfe_equs_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata,
u8 idx)
{
struct nv_pmu_perf_vfe_equ_boardobj_grp_set *pgrp_set =
(struct nv_pmu_perf_vfe_equ_boardobj_grp_set *)pmuboardobjgrp;
(struct nv_pmu_perf_vfe_equ_boardobj_grp_set *)(void *)pmuboardobjgrp;
nvgpu_log_info(g, " ");
@@ -94,7 +94,7 @@ int vfe_equ_sw_setup(struct gk20a *g)
BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, PERF, VFE_EQU);
status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
status = BOARDOBJGRP_PMU_CMD_GRP_SET_PACK_CONSTRUCT(g, pboardobjgrp,
perf, PERF, vfe_equ, VFE_EQU);
if (status != 0) {
nvgpu_err(g,
@@ -103,8 +103,8 @@ int vfe_equ_sw_setup(struct gk20a *g)
goto done;
}
pboardobjgrp->pmudatainit = _vfe_equs_pmudatainit;
pboardobjgrp->pmudatainstget = _vfe_equs_pmudata_instget;
pboardobjgrp->pmudatainit = vfe_equs_pmudatainit;
pboardobjgrp->pmudatainstget = vfe_equs_pmudata_instget;
status = devinit_get_vfe_equ_table(g, pvfeequobjs);
if (status != 0) {
@@ -149,12 +149,14 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
u8 equ_type = 0;
u32 szfmt;
bool done = false;
u32 hdrszfmt = 0;
union {
struct boardobj board_obj;
struct vfe_equ super;
struct vfe_equ_compare compare;
struct vfe_equ_minmax minmax;
struct vfe_equ_quadratic quadratic;
struct vfe_equ_scalar scalar;
} equ_data;
nvgpu_log_info(g, " ");
@@ -170,7 +172,14 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
nvgpu_memcpy((u8 *)&vfeequs_tbl_header, vfeequs_tbl_ptr,
VBIOS_CLOCKS_TABLE_1X_HEADER_SIZE_07);
if (vfeequs_tbl_header.header_size != VBIOS_CLOCKS_TABLE_1X_HEADER_SIZE_07) {
if (vfeequs_tbl_header.header_size == VBIOS_VFE_3X_HEADER_SIZE_07) {
hdrszfmt = VBIOS_VFE_3X_HEADER_SIZE_07;
} else if (vfeequs_tbl_header.header_size ==
VBIOS_VFE_3X_HEADER_SIZE_09) {
hdrszfmt = VBIOS_VFE_3X_HEADER_SIZE_09;
nvgpu_memcpy((u8 *)&vfeequs_tbl_header, vfeequs_tbl_ptr, hdrszfmt);
} else {
nvgpu_err(g, "Invalid VFE Table Header size\n");
status = -EINVAL;
goto done;
}
@@ -186,8 +195,7 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
goto done;
}
vfeequs_tbl_entry_ptr = vfeequs_tbl_ptr +
vfeequs_tbl_header.header_size +
vfeequs_tbl_entry_ptr = vfeequs_tbl_ptr + hdrszfmt +
(vfeequs_tbl_header.vfe_var_entry_count *
vfeequs_tbl_header.vfe_var_entry_size);
@@ -213,27 +221,57 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE)) {
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_UNITLESS:
equ_data.super.output_type =
CTRL_PERF_VFE_EQU_OUTPUT_TYPE_UNITLESS;
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_UNITLESS;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_FREQ_MHZ:
equ_data.super.output_type =
CTRL_PERF_VFE_EQU_OUTPUT_TYPE_FREQ_MHZ;
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_FREQ_MHZ;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VOLT_UV:
equ_data.super.output_type =
CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VOLT_UV;
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VOLT_UV;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VF_GAIN:
equ_data.super.output_type =
CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VF_GAIN;
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VF_GAIN;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VOLT_DELTA_UV:
equ_data.super.output_type =
CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VOLT_DELTA_UV;
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VOLT_DELTA_UV;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_WORK_TYPE:
equ_data.super.output_type =
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_WORK_TYPE;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_UTIL_RATIO:
equ_data.super.output_type =
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_UTIL_RATIO;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_WORK_FB_NORM:
equ_data.super.output_type =
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_WORK_FB_NORM;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_POWER_MW:
equ_data.super.output_type =
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_POWER_MW;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_PWR_OVER_UTIL_SLOPE:
equ_data.super.output_type =
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_PWR_OVER_UTIL_SLOPE;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_VIN_CODE:
equ_data.super.output_type =
(u8)CTRL_PERF_VFE_EQU_OUTPUT_TYPE_VIN_CODE;
break;
default:
@@ -261,14 +299,14 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
break;
case VBIOS_VFE_3X_EQU_ENTRY_TYPE_QUADRATIC:
equ_type = CTRL_PERF_VFE_EQU_TYPE_QUADRATIC;
equ_type = (u8)CTRL_PERF_VFE_EQU_TYPE_QUADRATIC;
equ_data.quadratic.coeffs[0] = equ.param0;
equ_data.quadratic.coeffs[1] = equ.param1;
equ_data.quadratic.coeffs[2] = equ.param2;
break;
case VBIOS_VFE_3X_EQU_ENTRY_TYPE_MINMAX:
equ_type = CTRL_PERF_VFE_EQU_TYPE_MINMAX;
equ_type = (u8)CTRL_PERF_VFE_EQU_TYPE_MINMAX;
equ_data.minmax.b_max = BIOS_GET_FIELD(bool, equ.param0,
VBIOS_VFE_3X_EQU_ENTRY_PAR0_MINMAX_CRIT) &&
(VBIOS_VFE_3X_EQU_ENTRY_PAR0_MINMAX_CRIT_MAX != 0U);
@@ -284,27 +322,30 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
{
u8 cmp_func = BIOS_GET_FIELD(u8, equ.param1,
VBIOS_VFE_3X_EQU_ENTRY_PAR1_COMPARE_FUNCTION);
equ_type = CTRL_PERF_VFE_EQU_TYPE_COMPARE;
equ_type = (u8)CTRL_PERF_VFE_EQU_TYPE_COMPARE;
switch (cmp_func) {
case VBIOS_VFE_3X_EQU_ENTRY_PAR1_COMPARE_FUNCTION_EQUAL:
equ_data.compare.func_id =
CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_EQUAL;
(u8)CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_EQUAL;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR1_COMPARE_FUNCTION_GREATER_EQ:
equ_data.compare.func_id =
CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER_EQ;
(u8)CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER_EQ;
break;
case VBIOS_VFE_3X_EQU_ENTRY_PAR1_COMPARE_FUNCTION_GREATER:
equ_data.compare.func_id =
CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER;
(u8)CTRL_PERF_VFE_EQU_COMPARE_FUNCTION_GREATER;
break;
default:
nvgpu_err(g,
"invalid vfe compare index %x type %x ",
index, cmp_func);
status = -EINVAL;
break;
}
if (status != 0) {
goto done;
}
equ_data.compare.equ_idx_true = BIOS_GET_FIELD(u8,
@@ -316,10 +357,23 @@ static int devinit_get_vfe_equ_table(struct gk20a *g,
equ_data.compare.criteria = equ.param0;
break;
}
case VBIOS_VFE_3X_EQU_ENTRY_TYPE_EQUATION_SCALAR:
{
equ_type = (u8)CTRL_PERF_VFE_EQU_TYPE_SCALAR;
equ_data.scalar.equ_idx_to_scale =
BIOS_GET_FIELD(u8, equ.param0,
VBIOS_VFE_3X_EQU_ENTRY_PAR0_EQUATION_SCALAR_IDX_TO_SCALE);
break;
}
default:
status = -EINVAL;
nvgpu_err(g, "Invalid equ[%d].type = 0x%x.",
index, (u8)equ.type);
break;
}
if (status != 0) {
goto done;
}
@@ -346,7 +400,7 @@ done:
return status;
}
static int _vfe_equ_pmudatainit_super(struct gk20a *g,
static int vfe_equ_pmudatainit_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -361,9 +415,9 @@ static int _vfe_equ_pmudatainit_super(struct gk20a *g,
return status;
}
pvfe_equ = (struct vfe_equ *)board_obj_ptr;
pvfe_equ = (struct vfe_equ *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_equ *)
pset = (struct nv_pmu_vfe_equ *)(void *)
ppmudata;
pset->var_idx = pvfe_equ->var_idx;
@@ -389,10 +443,10 @@ static int vfe_equ_construct_super(struct gk20a *g,
return -EINVAL;
}
pvfeequ = (struct vfe_equ *)*ppboardobj;
pvfeequ = (struct vfe_equ *)(void *)*ppboardobj;
pvfeequ->super.pmudatainit =
_vfe_equ_pmudatainit_super;
vfe_equ_pmudatainit_super;
pvfeequ->var_idx = ptmpequ->var_idx;
pvfeequ->equ_idx_next = ptmpequ->equ_idx_next;
@@ -403,7 +457,7 @@ static int vfe_equ_construct_super(struct gk20a *g,
return status;
}
static int _vfe_equ_pmudatainit_compare(struct gk20a *g,
static int vfe_equ_pmudatainit_compare(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -413,14 +467,14 @@ static int _vfe_equ_pmudatainit_compare(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
if (status != 0) {
return status;
}
pvfe_equ_compare = (struct vfe_equ_compare *)board_obj_ptr;
pvfe_equ_compare = (struct vfe_equ_compare *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_equ_compare *) ppmudata;
pset = (struct nv_pmu_vfe_equ_compare *)(void *)ppmudata;
pset->func_id = pvfe_equ_compare->func_id;
pset->equ_idx_true = pvfe_equ_compare->equ_idx_true;
@@ -445,16 +499,16 @@ static int vfe_equ_construct_compare(struct gk20a *g,
return -EINVAL;
}
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_EQU_TYPE_COMPARE);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_COMPARE);
status = vfe_equ_construct_super(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfeequ = (struct vfe_equ_compare *)*ppboardobj;
pvfeequ = (struct vfe_equ_compare *)(void *)*ppboardobj;
pvfeequ->super.super.pmudatainit =
_vfe_equ_pmudatainit_compare;
vfe_equ_pmudatainit_compare;
pvfeequ->func_id = ptmpequ->func_id;
pvfeequ->equ_idx_true = ptmpequ->equ_idx_true;
@@ -465,7 +519,7 @@ static int vfe_equ_construct_compare(struct gk20a *g,
return status;
}
static int _vfe_equ_pmudatainit_minmax(struct gk20a *g,
static int vfe_equ_pmudatainit_minmax(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -475,14 +529,14 @@ static int _vfe_equ_pmudatainit_minmax(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
if (status != 0) {
return status;
}
pvfe_equ_minmax = (struct vfe_equ_minmax *)board_obj_ptr;
pvfe_equ_minmax = (struct vfe_equ_minmax *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_equ_minmax *)
pset = (struct nv_pmu_vfe_equ_minmax *)(void *)
ppmudata;
pset->b_max = pvfe_equ_minmax->b_max;
@@ -506,16 +560,16 @@ static int vfe_equ_construct_minmax(struct gk20a *g,
return -EINVAL;
}
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_EQU_TYPE_MINMAX);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_MINMAX);
status = vfe_equ_construct_super(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfeequ = (struct vfe_equ_minmax *)*ppboardobj;
pvfeequ = (struct vfe_equ_minmax *)(void *)*ppboardobj;
pvfeequ->super.super.pmudatainit =
_vfe_equ_pmudatainit_minmax;
vfe_equ_pmudatainit_minmax;
pvfeequ->b_max = ptmpequ->b_max;
pvfeequ->equ_idx0 = ptmpequ->equ_idx0;
pvfeequ->equ_idx1 = ptmpequ->equ_idx1;
@@ -523,7 +577,7 @@ static int vfe_equ_construct_minmax(struct gk20a *g,
return status;
}
static int _vfe_equ_pmudatainit_quadratic(struct gk20a *g,
static int vfe_equ_pmudatainit_quadratic(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -534,14 +588,14 @@ static int _vfe_equ_pmudatainit_quadratic(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
if (status != 0) {
return status;
}
pvfe_equ_quadratic = (struct vfe_equ_quadratic *)board_obj_ptr;
pvfe_equ_quadratic = (struct vfe_equ_quadratic *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_equ_quadratic *) ppmudata;
pset = (struct nv_pmu_vfe_equ_quadratic *)(void *)ppmudata;
for (i = 0; i < CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT; i++) {
pset->coeffs[i] = pvfe_equ_quadratic->coeffs[i];
@@ -565,16 +619,16 @@ static int vfe_equ_construct_quadratic(struct gk20a *g,
return -EINVAL;
}
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_EQU_TYPE_QUADRATIC);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_QUADRATIC);
status = vfe_equ_construct_super(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfeequ = (struct vfe_equ_quadratic *)*ppboardobj;
pvfeequ = (struct vfe_equ_quadratic *)(void *)*ppboardobj;
pvfeequ->super.super.pmudatainit =
_vfe_equ_pmudatainit_quadratic;
vfe_equ_pmudatainit_quadratic;
for (i = 0; i < CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT; i++) {
pvfeequ->coeffs[i] = ptmpequ->coeffs[i];
@@ -583,6 +637,61 @@ static int vfe_equ_construct_quadratic(struct gk20a *g,
return status;
}
static int vfe_equ_pmudatainit_scalar(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
int status = 0;
struct vfe_equ_scalar *pvfe_equ_scalar;
struct nv_pmu_vfe_equ_scalar *pset;
nvgpu_log_info(g, " ");
status = vfe_equ_pmudatainit_super(g, board_obj_ptr, ppmudata);
if (status != 0) {
return status;
}
pvfe_equ_scalar = (struct vfe_equ_scalar *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_equ_scalar *)(void *)
ppmudata;
pset->equ_idx_to_scale = pvfe_equ_scalar->equ_idx_to_scale;
return status;
}
static int vfe_equ_construct_scalar(struct gk20a *g,
struct boardobj **ppboardobj,
u16 size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct vfe_equ_scalar *pvfeequ;
struct vfe_equ_scalar *ptmpequ =
(struct vfe_equ_scalar *)pargs;
int status = 0;
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_EQU_TYPE_SCALAR) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_EQU_TYPE_SCALAR);
status = vfe_equ_construct_super(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfeequ = (struct vfe_equ_scalar *)(void *)*ppboardobj;
pvfeequ->super.super.pmudatainit =
vfe_equ_pmudatainit_scalar;
pvfeequ->equ_idx_to_scale = ptmpequ->equ_idx_to_scale;
return status;
}
static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs)
{
struct boardobj *board_obj_ptr = NULL;
@@ -606,9 +715,14 @@ static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs)
sizeof(struct vfe_equ_quadratic), pargs);
break;
default:
return NULL;
case CTRL_PERF_VFE_EQU_TYPE_SCALAR:
status = vfe_equ_construct_scalar(g, &board_obj_ptr,
sizeof(struct vfe_equ_scalar), pargs);
break;
default:
status = -EINVAL;
break;
}
if (status != 0) {

4
drivers/gpu/nvgpu/pmu_perf/vfe_equ.h
View File

@@ -81,4 +81,8 @@ struct vfe_equ_quadratic {
u32 coeffs[CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT];
};
struct vfe_equ_scalar {
struct vfe_equ super;
u8 equ_idx_to_scale;
};
#endif /* NVGPU_PERF_VFE_EQU_H */

277
drivers/gpu/nvgpu/pmu_perf/vfe_var.c
View File

@@ -38,14 +38,14 @@ static int vfe_var_construct_single(struct gk20a *g,
struct boardobj **ppboardobj,
u16 size, void *pargs);
static int _vfe_vars_pmudatainit(struct gk20a *g,
static int vfe_vars_pmudatainit(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu)
{
struct nv_pmu_perf_vfe_var_boardobjgrp_set_header *pset =
(struct nv_pmu_perf_vfe_var_boardobjgrp_set_header *)
(struct nv_pmu_perf_vfe_var_boardobjgrp_set_header *)(void *)
pboardobjgrppmu;
struct vfe_vars *pvars = (struct vfe_vars *)pboardobjgrp;
struct vfe_vars *pvars = (struct vfe_vars *)(void *)pboardobjgrp;
int status = 0;
status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu);
@@ -61,13 +61,13 @@ done:
return status;
}
static int _vfe_vars_pmudata_instget(struct gk20a *g,
static int vfe_vars_pmudata_instget(struct gk20a *g,
struct nv_pmu_boardobjgrp *pmuboardobjgrp,
struct nv_pmu_boardobj **ppboardobjpmudata,
u8 idx)
{
struct nv_pmu_perf_vfe_var_boardobj_grp_set *pgrp_set =
(struct nv_pmu_perf_vfe_var_boardobj_grp_set *)
(struct nv_pmu_perf_vfe_var_boardobj_grp_set *)(void *)
pmuboardobjgrp;
nvgpu_log_info(g, " ");
@@ -84,7 +84,7 @@ static int _vfe_vars_pmudata_instget(struct gk20a *g,
return 0;
}
static int _vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu,
static int vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu,
struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx)
{
struct nv_pmu_perf_vfe_var_boardobj_grp_get_status *pgrp_get_status =
@@ -123,7 +123,7 @@ int vfe_var_sw_setup(struct gk20a *g)
BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, PERF, VFE_VAR);
status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
status = BOARDOBJGRP_PMU_CMD_GRP_SET_PACK_CONSTRUCT(g, pboardobjgrp,
perf, PERF, vfe_var, VFE_VAR);
if (status != 0) {
nvgpu_err(g,
@@ -132,16 +132,16 @@ int vfe_var_sw_setup(struct gk20a *g)
goto done;
}
pboardobjgrp->pmudatainit = _vfe_vars_pmudatainit;
pboardobjgrp->pmudatainstget = _vfe_vars_pmudata_instget;
pboardobjgrp->pmustatusinstget = _vfe_vars_pmustatus_instget;
pboardobjgrp->pmudatainit = vfe_vars_pmudatainit;
pboardobjgrp->pmudatainstget = vfe_vars_pmudata_instget;
pboardobjgrp->pmustatusinstget = vfe_vars_pmustatus_instget;
status = devinit_get_vfe_var_table(g, pvfevarobjs);
if (status != 0) {
goto done;
}
status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g,
status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_PACK_CONSTRUCT(g,
&g->perf_pmu->vfe_varobjs.super.super,
perf, PERF, vfe_var, VFE_VAR);
if (status != 0) {
@@ -175,7 +175,7 @@ int vfe_var_pmu_setup(struct gk20a *g)
return status;
}
static u32 dev_init_get_vfield_info(struct gk20a *g,
static int dev_init_get_vfield_info(struct gk20a *g,
struct vfe_var_single_sensed_fuse *pvfevar)
{
u8 *vfieldtableptr = NULL;
@@ -191,7 +191,7 @@ static u32 dev_init_get_vfield_info(struct gk20a *g,
struct vfield_entry ventry;
struct ctrl_bios_vfield_register_segment *psegment = NULL;
u8 *psegmentcount = NULL;
u32 status = 0;
int status = 0;
vfieldregtableptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
g->bios.virt_token, VP_FIELD_REGISTER);
@@ -284,6 +284,9 @@ static u32 dev_init_get_vfield_info(struct gk20a *g,
psegment->type =
NV_PMU_BIOS_VFIELD_DESC_CODE_INVALID;
status = -EINVAL;
break;
}
if (status != 0) {
goto done;
}
@@ -299,7 +302,7 @@ done:
return status;
}
static int _vfe_var_pmudatainit_super(struct gk20a *g,
static int vfe_var_pmudatainit_super(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -314,8 +317,8 @@ static int _vfe_var_pmudatainit_super(struct gk20a *g,
return status;
}
pvfe_var = (struct vfe_var *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var *) ppmudata;
pvfe_var = (struct vfe_var *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var *)(void *)ppmudata;
pset->out_range_min = pvfe_var->out_range_min;
pset->out_range_max = pvfe_var->out_range_max;
@@ -343,10 +346,10 @@ static int vfe_var_construct_super(struct gk20a *g,
return -EINVAL;
}
pvfevar = (struct vfe_var *)*ppboardobj;
pvfevar = (struct vfe_var *)(void *)*ppboardobj;
pvfevar->super.pmudatainit =
_vfe_var_pmudatainit_super;
vfe_var_pmudatainit_super;
pvfevar->out_range_min = ptmpvar->out_range_min;
pvfevar->out_range_max = ptmpvar->out_range_max;
@@ -358,7 +361,7 @@ static int vfe_var_construct_super(struct gk20a *g,
return status;
}
static int _vfe_var_pmudatainit_derived(struct gk20a *g,
static int vfe_var_pmudatainit_derived(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -366,7 +369,7 @@ static int _vfe_var_pmudatainit_derived(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_var_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_super(g, board_obj_ptr, ppmudata);
return status;
}
@@ -379,21 +382,21 @@ static int vfe_var_construct_derived(struct gk20a *g,
int status = 0;
struct vfe_var_derived *pvfevar;
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED);
status = vfe_var_construct_super(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_derived *)*ppboardobj;
pvfevar = (struct vfe_var_derived *)(void *)*ppboardobj;
pvfevar->super.super.pmudatainit =
_vfe_var_pmudatainit_derived;
vfe_var_pmudatainit_derived;
return status;
}
static int _vfe_var_pmudatainit_derived_product(struct gk20a *g,
static int vfe_var_pmudatainit_derived_product(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -403,14 +406,14 @@ static int _vfe_var_pmudatainit_derived_product(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_var_pmudatainit_derived(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_derived(g, board_obj_ptr, ppmudata);
if (status != 0) {
return status;
}
pvfe_var_derived_product =
(struct vfe_var_derived_product *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_derived_product *)ppmudata;
(struct vfe_var_derived_product *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_derived_product *)(void *)ppmudata;
pset->var_idx0 = pvfe_var_derived_product->var_idx0;
pset->var_idx1 = pvfe_var_derived_product->var_idx1;
@@ -432,16 +435,16 @@ static int vfe_var_construct_derived_product(struct gk20a *g,
return -EINVAL;
}
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT);
status = vfe_var_construct_derived(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_derived_product *)*ppboardobj;
pvfevar = (struct vfe_var_derived_product *)(void *)*ppboardobj;
pvfevar->super.super.super.pmudatainit =
_vfe_var_pmudatainit_derived_product;
vfe_var_pmudatainit_derived_product;
pvfevar->var_idx0 = ptmpvar->var_idx0;
pvfevar->var_idx1 = ptmpvar->var_idx1;
@@ -450,7 +453,7 @@ static int vfe_var_construct_derived_product(struct gk20a *g,
return status;
}
static int _vfe_var_pmudatainit_derived_sum(struct gk20a *g,
static int vfe_var_pmudatainit_derived_sum(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -460,13 +463,14 @@ static int _vfe_var_pmudatainit_derived_sum(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_var_pmudatainit_derived(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_derived(g, board_obj_ptr, ppmudata);
if (status != 0) {
return status;
}
pvfe_var_derived_sum = (struct vfe_var_derived_sum *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_derived_sum *)ppmudata;
pvfe_var_derived_sum = (struct vfe_var_derived_sum *)
(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_derived_sum *)(void *)ppmudata;
pset->var_idx0 = pvfe_var_derived_sum->var_idx0;
pset->var_idx1 = pvfe_var_derived_sum->var_idx1;
@@ -488,16 +492,16 @@ static int vfe_var_construct_derived_sum(struct gk20a *g,
return -EINVAL;
}
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM);
status = vfe_var_construct_derived(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_derived_sum *)*ppboardobj;
pvfevar = (struct vfe_var_derived_sum *)(void *)*ppboardobj;
pvfevar->super.super.super.pmudatainit =
_vfe_var_pmudatainit_derived_sum;
vfe_var_pmudatainit_derived_sum;
pvfevar->var_idx0 = ptmpvar->var_idx0;
pvfevar->var_idx1 = ptmpvar->var_idx1;
@@ -505,7 +509,7 @@ static int vfe_var_construct_derived_sum(struct gk20a *g,
return status;
}
static int _vfe_var_pmudatainit_single(struct gk20a *g,
static int vfe_var_pmudatainit_single(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -515,13 +519,13 @@ static int _vfe_var_pmudatainit_single(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_var_pmudatainit_super(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_super(g, board_obj_ptr, ppmudata);
if (status != 0) {
return status;
}
pvfe_var_single = (struct vfe_var_single *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_single *)
pvfe_var_single = (struct vfe_var_single *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_single *)(void *)
ppmudata;
pset->override_type = pvfe_var_single->override_type;
@@ -530,15 +534,23 @@ static int _vfe_var_pmudatainit_single(struct gk20a *g,
return status;
}
static int _vfe_var_pmudatainit_single_frequency(struct gk20a *g,
static int vfe_var_pmudatainit_single_frequency(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
int status = 0;
struct vfe_var_single_frequency *pvfe_var_single_frequency;
struct nv_pmu_vfe_var_single_frequency *pset;
nvgpu_log_info(g, " ");
status = _vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
pvfe_var_single_frequency = (struct vfe_var_single_frequency *)
(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_single_frequency *)(void *)ppmudata;
pset->clk_domain_idx = pvfe_var_single_frequency->clk_domain_idx;
return status;
}
@@ -549,6 +561,8 @@ static int vfe_var_construct_single_frequency(struct gk20a *g,
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct vfe_var_single_frequency *pvfevar;
struct vfe_var_single_frequency *ptmpvar =
(struct vfe_var_single_frequency *)pargs;
int status = 0;
nvgpu_log_info(g, " ");
@@ -557,25 +571,84 @@ static int vfe_var_construct_single_frequency(struct gk20a *g,
return -EINVAL;
}
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY);
status = vfe_var_construct_single(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_frequency *)*ppboardobj;
pvfevar = (struct vfe_var_single_frequency *)(void *)*ppboardobj;
pvfevar->super.super.super.pmudatainit =
_vfe_var_pmudatainit_single_frequency;
vfe_var_pmudatainit_single_frequency;
pvfevar->super.super.b_is_dynamic = false;
pvfevar->super.super.b_is_dynamic_valid = true;
pvfevar->clk_domain_idx = ptmpvar->clk_domain_idx;
nvgpu_log_info(g, "Done");
return status;
}
static int _vfe_var_pmudatainit_single_sensed(struct gk20a *g,
static int vfe_var_pmudatainit_single_caller_specified(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
int status = 0;
struct vfe_var_single_caller_specified
*pvfe_var_single_caller_specified;
struct nv_pmu_vfe_var_single_caller_specified *pset;
nvgpu_log_info(g, " ");
status = vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
pvfe_var_single_caller_specified =
(struct vfe_var_single_caller_specified *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_single_caller_specified *)
(void *)ppmudata;
pset->uid = pvfe_var_single_caller_specified->uid;
return status;
}
static int vfe_var_construct_single_caller_specified(struct gk20a *g,
struct boardobj **ppboardobj,
u16 size, void *pargs)
{
struct boardobj *ptmpobj = (struct boardobj *)pargs;
struct vfe_var_single_caller_specified *pvfevar;
struct vfe_var_single_caller_specified *ptmpvar =
(struct vfe_var_single_caller_specified *)pargs;
int status = 0;
nvgpu_log_info(g, " ");
if (BOARDOBJ_GET_TYPE(pargs) != CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY) {
return -EINVAL;
}
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY);
status = vfe_var_construct_single(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_caller_specified *)(void *)*ppboardobj;
pvfevar->super.super.super.pmudatainit =
vfe_var_pmudatainit_single_caller_specified;
pvfevar->super.super.b_is_dynamic = false;
pvfevar->super.super.b_is_dynamic_valid = true;
pvfevar->uid = ptmpvar->uid;
nvgpu_log_info(g, "Done");
return status;
}
static int vfe_var_pmudatainit_single_sensed(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -583,12 +656,12 @@ static int _vfe_var_pmudatainit_single_sensed(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
return status;
}
static int _vfe_var_pmudatainit_single_sensed_fuse(struct gk20a *g,
static int vfe_var_pmudatainit_single_sensed_fuse(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -598,15 +671,15 @@ static int _vfe_var_pmudatainit_single_sensed_fuse(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_var_pmudatainit_single_sensed(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_single_sensed(g, board_obj_ptr, ppmudata);
if (status != 0) {
return status;
}
pvfe_var_single_sensed_fuse =
(struct vfe_var_single_sensed_fuse *)board_obj_ptr;
(struct vfe_var_single_sensed_fuse *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_single_sensed_fuse *)
pset = (struct nv_pmu_vfe_var_single_sensed_fuse *)(void *)
ppmudata;
nvgpu_memcpy((u8 *)&pset->vfield_info,
@@ -636,16 +709,16 @@ static int vfe_var_construct_single_sensed(struct gk20a *g,
nvgpu_log_info(g, " ");
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED);
status = vfe_var_construct_single(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_sensed *)*ppboardobj;
pvfevar = (struct vfe_var_single_sensed *)(void *)*ppboardobj;
pvfevar->super.super.super.pmudatainit =
_vfe_var_pmudatainit_single_sensed;
vfe_var_pmudatainit_single_sensed;
nvgpu_log_info(g, "Done");
@@ -668,16 +741,16 @@ static int vfe_var_construct_single_sensed_fuse(struct gk20a *g,
return -EINVAL;
}
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE);
status = vfe_var_construct_single_sensed(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_sensed_fuse *)*ppboardobj;
pvfevar = (struct vfe_var_single_sensed_fuse *)(void *)*ppboardobj;
pvfevar->super.super.super.super.pmudatainit =
_vfe_var_pmudatainit_single_sensed_fuse;
vfe_var_pmudatainit_single_sensed_fuse;
pvfevar->vfield_info.v_field_id = ptmpvar->vfield_info.v_field_id;
pvfevar->vfield_info.fuse_val_default =
@@ -720,7 +793,7 @@ exit:
return status;
}
static int _vfe_var_pmudatainit_single_sensed_temp(struct gk20a *g,
static int vfe_var_pmudatainit_single_sensed_temp(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -730,15 +803,15 @@ static int _vfe_var_pmudatainit_single_sensed_temp(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_var_pmudatainit_single_sensed(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_single_sensed(g, board_obj_ptr, ppmudata);
if (status != 0) {
return status;
}
pvfe_var_single_sensed_temp =
(struct vfe_var_single_sensed_temp *)board_obj_ptr;
(struct vfe_var_single_sensed_temp *)(void *)board_obj_ptr;
pset = (struct nv_pmu_vfe_var_single_sensed_temp *)
pset = (struct nv_pmu_vfe_var_single_sensed_temp *)(void *)
ppmudata;
pset->therm_channel_index =
pvfe_var_single_sensed_temp->therm_channel_index;
@@ -765,16 +838,16 @@ static int vfe_var_construct_single_sensed_temp(struct gk20a *g,
return -EINVAL;
}
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP);
status = vfe_var_construct_single_sensed(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_sensed_temp *)*ppboardobj;
pvfevar = (struct vfe_var_single_sensed_temp *)(void *)*ppboardobj;
pvfevar->super.super.super.super.pmudatainit =
_vfe_var_pmudatainit_single_sensed_temp;
vfe_var_pmudatainit_single_sensed_temp;
pvfevar->therm_channel_index =
ptmpvar->therm_channel_index;
@@ -790,7 +863,7 @@ static int vfe_var_construct_single_sensed_temp(struct gk20a *g,
return status;
}
static int _vfe_var_pmudatainit_single_voltage(struct gk20a *g,
static int vfe_var_pmudatainit_single_voltage(struct gk20a *g,
struct boardobj *board_obj_ptr,
struct nv_pmu_boardobj *ppmudata)
{
@@ -798,7 +871,7 @@ static int _vfe_var_pmudatainit_single_voltage(struct gk20a *g,
nvgpu_log_info(g, " ");
status = _vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
status = vfe_var_pmudatainit_single(g, board_obj_ptr, ppmudata);
return status;
}
@@ -815,16 +888,16 @@ static int vfe_var_construct_single_voltage(struct gk20a *g,
return -EINVAL;
}
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE);
status = vfe_var_construct_super(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single_voltage *)*ppboardobj;
pvfevar = (struct vfe_var_single_voltage *)(void *)*ppboardobj;
pvfevar->super.super.super.pmudatainit =
_vfe_var_pmudatainit_single_voltage;
vfe_var_pmudatainit_single_voltage;
pvfevar->super.super.b_is_dynamic = false;
pvfevar->super.super.b_is_dynamic_valid = true;
@@ -869,11 +942,17 @@ static struct vfe_var *construct_vfe_var(struct gk20a *g, void *pargs)
sizeof(struct vfe_var_single_voltage), pargs);
break;
case CTRL_PERF_VFE_VAR_TYPE_SINGLE_CALLER_SPECIFIED:
status = vfe_var_construct_single_caller_specified(g, &board_obj_ptr,
sizeof(struct vfe_var_single_caller_specified), pargs);
break;
case CTRL_PERF_VFE_VAR_TYPE_DERIVED:
case CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED:
case CTRL_PERF_VFE_VAR_TYPE_SINGLE:
default:
return NULL;
status = -EINVAL;
break;
}
if (status != 0) {
@@ -899,6 +978,10 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
u8 var_type;
u32 szfmt, val;
bool done = false;
u32 hdrszfmt = 0;
u8 clk_domain_idx_available =
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IS_AVAILABLE_NO;
union {
struct boardobj board_obj;
struct vfe_var super;
@@ -906,6 +989,8 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
struct vfe_var_derived_sum derived_sum;
struct vfe_var_single_sensed_fuse single_sensed_fuse;
struct vfe_var_single_sensed_temp single_sensed_temp;
struct vfe_var_single_frequency single_freq;
struct vfe_var_single_caller_specified single_caller_specified;
} var_data;
nvgpu_log_info(g, " ");
@@ -920,8 +1005,14 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
nvgpu_memcpy((u8 *)&vfevars_tbl_header, vfevars_tbl_ptr,
VBIOS_CLOCKS_TABLE_1X_HEADER_SIZE_07);
if (vfevars_tbl_header.header_size !=
VBIOS_CLOCKS_TABLE_1X_HEADER_SIZE_07){
if (vfevars_tbl_header.header_size == VBIOS_VFE_3X_HEADER_SIZE_07) {
hdrszfmt = VBIOS_VFE_3X_HEADER_SIZE_07;
} else if (vfevars_tbl_header.header_size ==
VBIOS_VFE_3X_HEADER_SIZE_09) {
hdrszfmt = VBIOS_VFE_3X_HEADER_SIZE_09;
nvgpu_memcpy((u8 *)&vfevars_tbl_header, vfevars_tbl_ptr, hdrszfmt);
} else {
nvgpu_err(g, "Invalid VFE Table Header size\n");
status = -EINVAL;
goto done;
}
@@ -933,13 +1024,13 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
VBIOS_VFE_3X_VAR_ENTRY_SIZE_11) {
szfmt = VBIOS_VFE_3X_VAR_ENTRY_SIZE_11;
} else {
nvgpu_err(g, "Invalid VFE VAR Entry size\n");
status = -EINVAL;
goto done;
}
/* Read table entries*/
vfevars_tbl_entry_ptr = vfevars_tbl_ptr +
vfevars_tbl_header.header_size;
vfevars_tbl_entry_ptr = vfevars_tbl_ptr + hdrszfmt;
for (index = 0;
index < vfevars_tbl_header.vfe_var_entry_count;
index++) {
@@ -956,15 +1047,31 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
break;
case VBIOS_VFE_3X_VAR_ENTRY_TYPE_SINGLE_FREQUENCY:
var_type = CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY;
var_type = (u8)CTRL_PERF_VFE_VAR_TYPE_SINGLE_FREQUENCY;
clk_domain_idx_available =
BIOS_GET_FIELD(u8, var.param0,
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IS_AVAILABLE);
if (clk_domain_idx_available ==
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IS_AVAILABLE_YES) {
var_data.single_freq.clk_domain_idx =
BIOS_GET_FIELD(u8, var.param0,
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SFREQ_CLK_DOMAIN_IDX);
};
break;
case VBIOS_VFE_3X_VAR_ENTRY_TYPE_SINGLE_VOLTAGE:
var_type = CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE;
var_type = (u8)CTRL_PERF_VFE_VAR_TYPE_SINGLE_VOLTAGE;
break;
case VBIOS_VFE_3X_VAR_ENTRY_TYPE_SINGLE_CALLER_SPECIFIED:
var_type = (u8)CTRL_PERF_VFE_VAR_TYPE_SINGLE_CALLER_SPECIFIED;
var_data.single_caller_specified.uid =
BIOS_GET_FIELD(u8, var.param0,
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SINGLE_CALLER_SPECIFIED_UID);
break;
case VBIOS_VFE_3X_VAR_ENTRY_TYPE_SINGLE_SENSED_TEMP:
var_type = CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP;
var_type = (u8)CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_TEMP;
var_data.single_sensed_temp.temp_default = 0x9600;
var_data.single_sensed_temp.therm_channel_index =
BIOS_GET_FIELD(u8, var.param0,
@@ -980,7 +1087,7 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
break;
case VBIOS_VFE_3X_VAR_ENTRY_TYPE_SINGLE_SENSED_FUSE:
var_type = CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE;
var_type = (u8)CTRL_PERF_VFE_VAR_TYPE_SINGLE_SENSED_FUSE;
var_data.single_sensed_fuse.vfield_info.v_field_id =
BIOS_GET_FIELD(u8, var.param0,
VBIOS_VFE_3X_VAR_ENTRY_PAR0_SSFUSE_VFIELD_ID);
@@ -1020,7 +1127,7 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
break;
case VBIOS_VFE_3X_VAR_ENTRY_TYPE_DERIVED_PRODUCT:
var_type = CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT;
var_type = (u8)CTRL_PERF_VFE_VAR_TYPE_DERIVED_PRODUCT;
var_data.derived_product.var_idx0 =
BIOS_GET_FIELD(u8, var.param0,
VBIOS_VFE_3X_VAR_ENTRY_PAR0_DPROD_VFE_VAR_IDX_0);
@@ -1030,7 +1137,7 @@ static int devinit_get_vfe_var_table(struct gk20a *g,
break;
case VBIOS_VFE_3X_VAR_ENTRY_TYPE_DERIVED_SUM:
var_type = CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM;
var_type = (u8)CTRL_PERF_VFE_VAR_TYPE_DERIVED_SUM;
var_data.derived_sum.var_idx0 =
BIOS_GET_FIELD(u8, var.param0,
VBIOS_VFE_3X_VAR_ENTRY_PAR0_DSUM_VFE_VAR_IDX_0);
@@ -1090,18 +1197,18 @@ static int vfe_var_construct_single(struct gk20a *g,
nvgpu_log_info(g, " ");
ptmpobj->type_mask |= BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE);
ptmpobj->type_mask |= (u32)BIT(CTRL_PERF_VFE_VAR_TYPE_SINGLE);
status = vfe_var_construct_super(g, ppboardobj, size, pargs);
if (status != 0) {
return -EINVAL;
}
pvfevar = (struct vfe_var_single *)*ppboardobj;
pvfevar = (struct vfe_var_single *)(void *)*ppboardobj;
pvfevar->super.super.pmudatainit =
_vfe_var_pmudatainit_single;
vfe_var_pmudatainit_single;
pvfevar->override_type = CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_NONE;
pvfevar->override_type = (u8)CTRL_PERF_VFE_VAR_SINGLE_OVERRIDE_TYPE_NONE;
pvfevar->override_value = 0;
nvgpu_log_info(g, "Done");

6
drivers/gpu/nvgpu/pmu_perf/vfe_var.h
View File

@@ -77,12 +77,18 @@ struct vfe_var_single {
struct vfe_var_single_frequency {
struct vfe_var_single super;
u8 clk_domain_idx;
};
struct vfe_var_single_voltage {
struct vfe_var_single super;
};
struct vfe_var_single_caller_specified {
struct vfe_var_single super;
u8 uid;
};
struct vfe_var_single_sensed {
struct vfe_var_single super;
};