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gpu: nvgpu: compile out PMU RTOS init code for safety

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Compile out PMU RTOS init calls called from other unit when
PMU RTOS support is disabled for safety build by setting
NVGPU_LS_PMU build flag to 0

JIRA NVGPU-3418

Change-Id: I021a2e91883c561a35c7c87e88993f867160e8c0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124848
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2019-05-24 12:27:13 +05:30
committed by mobile promotions
parent 120defb7cb
commit c7d854a957
2 changed files with 13 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
drivers/gpu/nvgpu/common/init/nvgpu_init.c
View File

@@ -98,10 +98,12 @@ int gk20a_prepare_poweroff(struct gk20a *g)
}
}
#ifdef NVGPU_LS_PMU
/* disable elpg before gr or fifo suspend */
if (g->support_ls_pmu) {
ret = nvgpu_pmu_destroy(g, g->pmu);
}
#endif
#ifdef NVGPU_DGPU_SUPPORT
if (nvgpu_is_enabled(g, NVGPU_SUPPORT_SEC2_RTOS)) {
@@ -383,12 +385,14 @@ int gk20a_finalize_poweron(struct gk20a *g)
}
#endif
#ifdef NVGPU_LS_PMU
err = nvgpu_pmu_init(g, g->pmu);
if (err != 0) {
nvgpu_err(g, "failed to init gk20a pmu");
nvgpu_mutex_release(&g->tpc_pg_lock);
goto done;
}
#endif
err = nvgpu_fbp_init_support(g);
if (err != 0) {
@@ -413,6 +417,7 @@ int gk20a_finalize_poweron(struct gk20a *g)
nvgpu_mutex_release(&g->tpc_pg_lock);
#ifdef NVGPU_LS_PMU
if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) {
err = nvgpu_pmu_pstate_sw_setup(g);
if (err != 0) {
@@ -435,7 +440,9 @@ int gk20a_finalize_poweron(struct gk20a *g)
nvgpu_err(g, "failed to set boot clk");
goto done;
}
} else {
} else
#endif
{
err = nvgpu_clk_arb_init_arbiter(g);
if (err != 0) {
nvgpu_err(g, "failed to init clk arb");

7
drivers/gpu/nvgpu/common/pmu/pmu.c
View File

@@ -82,7 +82,6 @@ int nvgpu_pmu_lock_release(struct gk20a *g, struct nvgpu_pmu *pmu,
return nvgpu_pmu_mutex_release(g, pmu->mutexes, id, token);
}
#endif
/* PMU RTOS init/setup functions */
int nvgpu_pmu_destroy(struct gk20a *g, struct nvgpu_pmu *pmu)
@@ -283,6 +282,7 @@ int nvgpu_pmu_init(struct gk20a *g, struct nvgpu_pmu *pmu)
exit:
return err;
}
#endif
int nvgpu_pmu_early_init(struct gk20a *g, struct nvgpu_pmu **pmu_p)
{
@@ -321,7 +321,7 @@ int nvgpu_pmu_early_init(struct gk20a *g, struct nvgpu_pmu **pmu_p)
nvgpu_set_enabled(g, NVGPU_PMU_PERFMON, false);
goto exit;
}
#ifdef NVGPU_LS_PMU
err = nvgpu_mutex_init(&pmu->isr_mutex);
if (err != 0) {
goto init_failed;
@@ -373,6 +373,7 @@ int nvgpu_pmu_early_init(struct gk20a *g, struct nvgpu_pmu **pmu_p)
init_failed:
remove_pmu_support(pmu);
#endif
exit:
return err;
}
@@ -439,7 +440,9 @@ static int pmu_enable(struct nvgpu_pmu *pmu, bool enable)
if (!enable) {
if (!g->ops.pmu.is_engine_in_reset(g)) {
#ifdef NVGPU_LS_PMU
g->ops.pmu.pmu_enable_irq(pmu, false);
#endif
pmu_enable_hw(pmu, false);
}
} else {