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gpu: nvgpu: fix MISRA Rule 2.2 no dead code
MISRA rule 2.2 defines dead code as "operations which are executed but removal of these operations has no effect on program behavior". Variable initializations violate this rule if initialized value is not used and replaced. This patch fixes some of these reported violations. Jira NVGPU-858 Change-Id: I694517ace8884c78c63f6346e455078d19b70b4d Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2110459 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -531,7 +531,6 @@ u32 nvgpu_ce_create_context(struct gk20a *g,
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ce_ctx->tsg = nvgpu_tsg_open(g, nvgpu_current_pid(g));
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if (ce_ctx->tsg == NULL) {
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nvgpu_err(g, "ce: gk20a tsg not available");
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err = -ENOMEM;
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goto end;
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}
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@@ -543,7 +542,6 @@ u32 nvgpu_ce_create_context(struct gk20a *g,
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nvgpu_current_pid(g), nvgpu_current_tid(g));
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if (ce_ctx->ch == NULL) {
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nvgpu_err(g, "ce: gk20a channel not available");
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err = -ENOMEM;
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goto end;
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}
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ce_ctx->ch->wdt.enabled = false;
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