gpu: nvgpu: fix MISRA Rule 2.2 no dead code

MISRA rule 2.2 defines dead code as "operations which are executed but
removal of these operations has no effect on program behavior".
Variable initializations violate this rule if initialized value is not
used and replaced.

This patch fixes some of these reported violations.

Jira NVGPU-858

Change-Id: I694517ace8884c78c63f6346e455078d19b70b4d
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2110459
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2019-05-02 08:45:20 -07:00
committed by mobile promotions
parent 9a450fe2bf
commit c90fcbae2a
6 changed files with 11 additions and 16 deletions

View File

@@ -531,7 +531,6 @@ u32 nvgpu_ce_create_context(struct gk20a *g,
ce_ctx->tsg = nvgpu_tsg_open(g, nvgpu_current_pid(g));
if (ce_ctx->tsg == NULL) {
nvgpu_err(g, "ce: gk20a tsg not available");
err = -ENOMEM;
goto end;
}
@@ -543,7 +542,6 @@ u32 nvgpu_ce_create_context(struct gk20a *g,
nvgpu_current_pid(g), nvgpu_current_tid(g));
if (ce_ctx->ch == NULL) {
nvgpu_err(g, "ce: gk20a channel not available");
err = -ENOMEM;
goto end;
}
ce_ctx->ch->wdt.enabled = false;