nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 10:34:43 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: move nvgpu_report_host_error

Browse Source 
Move nvgpu_report_host_error from gk20a/fifo_gk20a.c to
common/fifo/fifo.c

JIRA NVGPU-2011

Change-Id: Ia42c901edafa7bc11a8da4152b92293a5d131d10
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2093119
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-04-09 11:32:23 -07:00
committed by mobile promotions
parent b4ec1c5dff
commit c99f13e842
2 changed files with 18 additions and 17 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/gpu/nvgpu/common/fifo/fifo.c
View File

@@ -31,6 +31,7 @@
#include <nvgpu/channel.h>
#include <nvgpu/tsg.h>
#include <nvgpu/vm_area.h>
#include <nvgpu/nvgpu_err.h>
#include <gk20a/fifo_gk20a.h>
@@ -258,3 +259,20 @@ clean_up:
return err;
}
void nvgpu_report_host_error(struct gk20a *g, u32 inst,
u32 err_id, u32 intr_info)
{
int ret;
if (g->ops.fifo.err_ops.report_host_err == NULL) {
return;
}
ret = g->ops.fifo.err_ops.report_host_err(g,
NVGPU_ERR_MODULE_HOST, inst, err_id, intr_info);
if (ret != 0) {
nvgpu_err(g, "Failed to report HOST error: \
inst=%u, err_id=%u, intr_info=%u, ret=%d",
inst, err_id, intr_info, ret);
}
}

17
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
View File

@@ -67,23 +67,6 @@
#define FECS_METHOD_WFI_RESTORE 0x80000U
void nvgpu_report_host_error(struct gk20a *g, u32 inst,
u32 err_id, u32 intr_info)
{
int ret;
if (g->ops.fifo.err_ops.report_host_err == NULL) {
return;
}
ret = g->ops.fifo.err_ops.report_host_err(g,
NVGPU_ERR_MODULE_HOST, inst, err_id, intr_info);
if (ret != 0) {
nvgpu_err(g, "Failed to report HOST error: \
inst=%u, err_id=%u, intr_info=%u, ret=%d",
inst, err_id, intr_info, ret);
}
}
int gk20a_init_fifo_reset_enable_hw(struct gk20a *g)
{
u32 timeout;