gpu: nvgpu: fix MISRA violation in cond unit

MISRA 20.7 rule requires macro paramaters to be wrapped in
parantheses when the parameter expands into an expression.
Fix the 20.7 violation in posix cond unit.

Jira NVGPU-3139

Change-Id: I37134cecaf7242e679cc5a7b5c2c5408ffcadc35
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2107180
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
ajesh
2019-04-25 15:40:39 +05:30
committed by mobile promotions
parent f9cc478c31
commit c9ff93be23

View File

@@ -91,7 +91,7 @@ void nvgpu_cond_unlock(struct nvgpu_cond *cond);
* signal.
*/
#define NVGPU_COND_WAIT_INTERRUPTIBLE(cond, condition, timeout_ms) \
NVGPU_COND_WAIT(cond, condition, timeout_ms)
NVGPU_COND_WAIT((cond), (condition), (timeout_ms))
#define NVGPU_COND_WAIT_TIMEOUT_LOCKED(cond, condition, ret, timeout_ms)\