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gpu: nvgpu: fix MISRA violation in cond unit
MISRA 20.7 rule requires macro paramaters to be wrapped in parantheses when the parameter expands into an expression. Fix the 20.7 violation in posix cond unit. Jira NVGPU-3139 Change-Id: I37134cecaf7242e679cc5a7b5c2c5408ffcadc35 Signed-off-by: ajesh <akv@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2107180 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -91,7 +91,7 @@ void nvgpu_cond_unlock(struct nvgpu_cond *cond);
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* signal.
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*/
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#define NVGPU_COND_WAIT_INTERRUPTIBLE(cond, condition, timeout_ms) \
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NVGPU_COND_WAIT(cond, condition, timeout_ms)
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NVGPU_COND_WAIT((cond), (condition), (timeout_ms))
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#define NVGPU_COND_WAIT_TIMEOUT_LOCKED(cond, condition, ret, timeout_ms)\
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