nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-24 02:22:34 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: APIs to disable/enable all engines' activity

Browse Source 
Add below APIs to disable/re-enable activity on all
engines
gk20a_fifo_disable_all_engine_activity()
gk20a_fifo_enable_all_engine_activity()

Bug 200133289

Change-Id: Ie01a260d587807a3c1712ee32fe870fbcb08f9cd
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/798747
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Deepak Nibade
2015-09-14 15:17:38 +05:30
committed by Terje Bergstrom
parent 41f9e97477
commit cb8c102131
2 changed files with 52 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

49
drivers/gpu/nvgpu/gk20a/fifo_gk20a.c
View File

@@ -1870,6 +1870,24 @@ int gk20a_fifo_enable_engine_activity(struct gk20a *g,
return 0;
}
int gk20a_fifo_enable_all_engine_activity(struct gk20a *g)
{
int i;
int err = 0, ret = 0;
for (i = 0; i < g->fifo.max_engines; i++) {
err = gk20a_fifo_enable_engine_activity(g,
&g->fifo.engine_info[i]);
if (err) {
gk20a_err(dev_from_gk20a(g),
"failed to enable engine %d activity\n", i);
ret = err;
}
}
return ret;
}
int gk20a_fifo_disable_engine_activity(struct gk20a *g,
struct fifo_engine_info_gk20a *eng_info,
bool wait_for_idle)
@@ -1944,6 +1962,37 @@ clean_up:
return err;
}
int gk20a_fifo_disable_all_engine_activity(struct gk20a *g,
bool wait_for_idle)
{
int i;
int err = 0, ret = 0;
for (i = 0; i < g->fifo.max_engines; i++) {
err = gk20a_fifo_disable_engine_activity(g,
&g->fifo.engine_info[i],
wait_for_idle);
if (err) {
gk20a_err(dev_from_gk20a(g),
"failed to disable engine %d activity\n", i);
ret = err;
break;
}
}
if (err) {
while (--i >= 0) {
err = gk20a_fifo_enable_engine_activity(g,
&g->fifo.engine_info[i]);
if (err)
gk20a_err(dev_from_gk20a(g),
"failed to re-enable engine %d activity\n", i);
}
}
return ret;
}
static void gk20a_fifo_runlist_reset_engines(struct gk20a *g, u32 runlist_id)
{
struct fifo_gk20a *f = &g->fifo;

3
drivers/gpu/nvgpu/gk20a/fifo_gk20a.h
View File

@@ -149,9 +149,12 @@ int gk20a_fifo_preempt(struct gk20a *g, struct channel_gk20a *ch);
int gk20a_fifo_enable_engine_activity(struct gk20a *g,
struct fifo_engine_info_gk20a *eng_info);
int gk20a_fifo_enable_all_engine_activity(struct gk20a *g);
int gk20a_fifo_disable_engine_activity(struct gk20a *g,
struct fifo_engine_info_gk20a *eng_info,
bool wait_for_idle);
int gk20a_fifo_disable_all_engine_activity(struct gk20a *g,
bool wait_for_idle);
u32 gk20a_fifo_engines_on_ch(struct gk20a *g, u32 hw_chid);
int gk20a_fifo_update_runlist(struct gk20a *g, u32 engine_id, u32 hw_chid,