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gpu: nvgpu: report MMU page fault errors to 3LSS
This patch adds support to report MMU page fault errors to 3LSS. JIRA NVGPU-3459 Change-Id: I3f06e594a75ae79bf4deef9acdc1829a002ea869 Signed-off-by: Rajesh Devaraj <rdevaraj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2142742 GVS: Gerrit_Virtual_Submit Reviewed-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-by: Ankur Kishore <ankkishore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -581,6 +581,12 @@ void gv11b_fb_handle_mmu_fault(struct gk20a *g, u32 niso_intr)
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if ((niso_intr &
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fb_niso_intr_mmu_other_fault_notify_m()) != 0U) {
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(void) nvgpu_report_mmu_err(g, NVGPU_ERR_MODULE_HUBMMU,
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GPU_HUBMMU_PAGE_FAULT_ERROR,
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NULL,
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fault_status,
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GPU_HUBMMU_OTHER_FAULT_NOTIFY);
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gv11b_fb_handle_dropped_mmu_fault(g, fault_status);
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gv11b_mm_mmu_fault_handle_other_fault_notify(g, fault_status);
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@@ -604,6 +610,12 @@ void gv11b_fb_handle_mmu_fault(struct gk20a *g, u32 niso_intr)
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if ((niso_intr &
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fb_niso_intr_mmu_nonreplayable_fault_overflow_m()) != 0U) {
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(void) nvgpu_report_mmu_err(g, NVGPU_ERR_MODULE_HUBMMU,
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GPU_HUBMMU_PAGE_FAULT_ERROR,
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NULL,
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fault_status,
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GPU_HUBMMU_NONREPLAYABLE_FAULT_OVERFLOW);
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gv11b_fb_handle_nonreplay_fault_overflow(g,
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fault_status);
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}
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@@ -622,6 +634,12 @@ void gv11b_fb_handle_mmu_fault(struct gk20a *g, u32 niso_intr)
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if ((niso_intr &
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fb_niso_intr_mmu_replayable_fault_overflow_m()) != 0U) {
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(void) nvgpu_report_mmu_err(g, NVGPU_ERR_MODULE_HUBMMU,
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GPU_HUBMMU_PAGE_FAULT_ERROR,
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NULL,
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fault_status,
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GPU_HUBMMU_REPLAYABLE_FAULT_OVERFLOW);
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gv11b_fb_handle_replay_fault_overflow(g,
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fault_status);
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}
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@@ -449,6 +449,7 @@ void gv11b_mm_mmu_fault_handle_nonreplay_replay_fault(struct gk20a *g,
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u32 invalidate_replay_val = 0U;
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u64 prev_fault_addr = 0ULL;
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u64 next_fault_addr = 0ULL;
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u32 sub_err_type = 0U;
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if (gv11b_fb_is_fault_buffer_empty(g, index, &get_indx)) {
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nvgpu_log(g, gpu_dbg_intr,
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@@ -481,6 +482,18 @@ void gv11b_mm_mmu_fault_handle_nonreplay_replay_fault(struct gk20a *g,
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gv11b_fb_copy_from_hw_fault_buf(g, mem, offset, mmufault);
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if (index == NVGPU_MMU_FAULT_REPLAY_REG_INDX) {
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sub_err_type = GPU_HUBMMU_REPLAYABLE_FAULT_NOTIFY;
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} else {
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sub_err_type = GPU_HUBMMU_NONREPLAYABLE_FAULT_NOTIFY;
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}
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(void) nvgpu_report_mmu_err(g, NVGPU_ERR_MODULE_HUBMMU,
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GPU_HUBMMU_PAGE_FAULT_ERROR,
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mmufault,
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fault_status,
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sub_err_type);
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nvgpu_assert(get_indx < U32_MAX);
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get_indx = (get_indx + 1U) % entries;
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nvgpu_log(g, gpu_dbg_intr, "new get index = %d", get_indx);
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@@ -26,6 +26,7 @@
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#include <nvgpu/types.h>
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struct gk20a;
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struct mmu_fault_info;
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#define NVGPU_ERR_MODULE_HOST (0U)
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#define NVGPU_ERR_MODULE_SM (1U)
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@@ -169,6 +170,14 @@ struct gr_exception_info {
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#define GPU_HUBMMU_PTE_DATA_ECC_UNCORRECTED (5U)
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#define GPU_HUBMMU_PDE0_DATA_ECC_CORRECTED (6U)
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#define GPU_HUBMMU_PDE0_DATA_ECC_UNCORRECTED (7U)
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#define GPU_HUBMMU_PAGE_FAULT_ERROR (8U)
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/* Sub-errors in GPU_HUBMMU_PAGE_FAULT_ERROR */
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#define GPU_HUBMMU_REPLAYABLE_FAULT_OVERFLOW (0U)
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#define GPU_HUBMMU_REPLAYABLE_FAULT_NOTIFY (1U)
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#define GPU_HUBMMU_NONREPLAYABLE_FAULT_OVERFLOW (2U)
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#define GPU_HUBMMU_NONREPLAYABLE_FAULT_NOTIFY (3U)
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#define GPU_HUBMMU_OTHER_FAULT_NOTIFY (4U)
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#define GPU_PRI_TIMEOUT_ERROR (0U)
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#define GPU_PRI_ACCESS_VIOLATION (1U)
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@@ -227,4 +236,8 @@ int nvgpu_report_pmu_err(struct gk20a *g, u32 hw_unit, u32 err_id,
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int nvgpu_report_pri_err(struct gk20a *g, u32 hw_unit, u32 inst,
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u32 err_type, u32 err_addr, u32 err_code);
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int nvgpu_report_mmu_err(struct gk20a *g, u32 hw_unit,
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u32 err_type, struct mmu_fault_info *fault_info,
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u32 status, u32 sub_err_type);
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#endif
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@@ -23,6 +23,7 @@
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#include <nvgpu/nvgpu_err.h>
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struct gk20a;
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struct mmu_fault_info;
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int nvgpu_report_host_err(struct gk20a *g, u32 hw_unit,
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u32 inst, u32 err_id, u32 intr_info)
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@@ -65,3 +66,10 @@ int nvgpu_report_ctxsw_err(struct gk20a *g, u32 hw_unit, u32 err_id,
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{
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return 0;
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}
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int nvgpu_report_mmu_err(struct gk20a *g, u32 hw_unit,
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u32 err_type, struct mmu_fault_info *fault_info,
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u32 status, u32 sub_err_type)
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{
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return 0;
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}
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@@ -30,6 +30,7 @@
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#include <nvgpu/nvgpu_err.h>
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struct gk20a;
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struct mmu_fault_info;
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#ifdef CONFIG_NVGPU_DEBUGGER
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void nvgpu_dbg_session_post_event(struct dbg_session_gk20a *dbg_s)
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@@ -87,3 +88,10 @@ int nvgpu_report_ctxsw_err(struct gk20a *g, u32 hw_unit, u32 err_id,
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{
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return 0;
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}
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int nvgpu_report_mmu_err(struct gk20a *g, u32 hw_unit,
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u32 err_type, struct mmu_fault_info *fault_info,
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u32 status, u32 sub_err_type)
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{
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return 0;
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}
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