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gpu: nvgpu: vgpu: cyclestat characteristics fixes

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Fix characteristics for cyclestats:

- SUPPORT_TSG and SUPPORT_CYCLE_STATS_SNAPSHOT were assigned the same value
- For vgpu, SUPPORT_CYCLE_STATS was set redundantly (but differently)
- For vgpu, if the css buffer size is 0, set the support flag to False

JIRA ESRM-88
Bug 200296210

Change-Id: Iaf98dafec55f171b5968c2a8248290284bf30922
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1593939
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Peter Daifuku
2017-11-07 16:05:58 -08:00
committed by mobile promotions
parent 016231c045
commit cddf69c549
3 changed files with 21 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/gpu/nvgpu/include/nvgpu/enabled.h
View File

@@ -78,28 +78,28 @@ struct gk20a;
/* NVGPU_IOCTL_CHANNEL_CYCLE_STATS_SNAPSHOT is available */
#define NVGPU_SUPPORT_CYCLE_STATS_SNAPSHOT 33
/* Both gpu driver and device support TSG */
#define NVGPU_SUPPORT_TSG 33
#define NVGPU_SUPPORT_TSG 34
/* Fast deterministic submits with no job tracking are supported */
#define NVGPU_SUPPORT_DETERMINISTIC_SUBMIT_NO_JOBTRACKING 34
#define NVGPU_SUPPORT_DETERMINISTIC_SUBMIT_NO_JOBTRACKING 35
/* Deterministic submits are supported even with job tracking */
#define NVGPU_SUPPORT_DETERMINISTIC_SUBMIT_FULL 35
#define NVGPU_SUPPORT_DETERMINISTIC_SUBMIT_FULL 36
/* NVGPU_SUBMIT_GPFIFO_FLAGS_RESCHEDULE_RUNLIST is available */
#define NVGPU_SUPPORT_RESCHEDULE_RUNLIST 36
#define NVGPU_SUPPORT_RESCHEDULE_RUNLIST 37
/* NVGPU_GPU_IOCTL_GET_EVENT_FD is available */
#define NVGPU_SUPPORT_DEVICE_EVENTS 37
#define NVGPU_SUPPORT_DEVICE_EVENTS 38
/* FECS context switch tracing is available */
#define NVGPU_SUPPORT_FECS_CTXSW_TRACE 38
#define NVGPU_SUPPORT_FECS_CTXSW_TRACE 39
/* NVGPU_GPU_IOCTL_SET_DETERMINISTIC_OPTS is available */
#define NVGPU_SUPPORT_DETERMINISTIC_OPTS 39
#define NVGPU_SUPPORT_DETERMINISTIC_OPTS 40
/*
* Security flags
*/
#define NVGPU_SEC_SECUREGPCCS 40
#define NVGPU_SEC_PRIVSECURITY 41
#define NVGPU_SEC_SECUREGPCCS 41
#define NVGPU_SEC_PRIVSECURITY 42
/*
* PMU flags.

14
drivers/gpu/nvgpu/vgpu/gm20b/vgpu_gr_gm20b.c
View File

@@ -30,10 +30,20 @@
void vgpu_gr_gm20b_init_cyclestats(struct gk20a *g)
{
#if defined(CONFIG_GK20A_CYCLE_STATS)
__nvgpu_set_enabled(g, NVGPU_SUPPORT_CYCLE_STATS, true);
__nvgpu_set_enabled(g, NVGPU_SUPPORT_CYCLE_STATS_SNAPSHOT, true);
bool snapshots_supported = true;
/* cyclestats not supported on vgpu */
__nvgpu_set_enabled(g, NVGPU_SUPPORT_CYCLE_STATS, false);
g->gpu_characteristics.max_css_buffer_size =
vgpu_css_get_buffer_size(g);
/* snapshots not supported if the buffer size is 0 */
if (g->gpu_characteristics.max_css_buffer_size == 0)
snapshots_supported = false;
__nvgpu_set_enabled(g, NVGPU_SUPPORT_CYCLE_STATS_SNAPSHOT,
snapshots_supported);
#endif
}

1
drivers/gpu/nvgpu/vgpu/vgpu.c
View File

@@ -371,7 +371,6 @@ int vgpu_init_gpu_characteristics(struct gk20a *g)
g->gpu_characteristics.map_buffer_batch_limit = 0;
/* features vgpu does not support */
__nvgpu_set_enabled(g, NVGPU_SUPPORT_CYCLE_STATS, false);
__nvgpu_set_enabled(g, NVGPU_SUPPORT_RESCHEDULE_RUNLIST, false);
return 0;