gpu: nvgpu: falcon: Qualify unsigned HW constants

-Falcon HW header re-generate for gk20a, gm20b, gp10b & gp106.
-Re-generate hardware headers so that all unsigned constants are
 qualified with postfix U. This removes the need for compiler to do
 implicit signed->unsigned conversions

Change-Id: Ifdaac2c697ee7ba8be627e059bf18024a67bbd27
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570775
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_falcon_gk20a.h

@@ -58,498 +58,498 @@
 
 static inline u32 falcon_falcon_irqsset_r(void)
 {
-	return 0x00000000;
+	return 0x00000000U;
 }
 static inline u32 falcon_falcon_irqsset_swgen0_set_f(void)
 {
-	return 0x40;
+	return 0x40U;
 }
 static inline u32 falcon_falcon_irqsclr_r(void)
 {
-	return 0x00000004;
+	return 0x00000004U;
 }
 static inline u32 falcon_falcon_irqstat_r(void)
 {
-	return 0x00000008;
+	return 0x00000008U;
 }
 static inline u32 falcon_falcon_irqstat_halt_true_f(void)
 {
-	return 0x10;
+	return 0x10U;
 }
 static inline u32 falcon_falcon_irqstat_exterr_true_f(void)
 {
-	return 0x20;
+	return 0x20U;
 }
 static inline u32 falcon_falcon_irqstat_swgen0_true_f(void)
 {
-	return 0x40;
+	return 0x40U;
 }
 static inline u32 falcon_falcon_irqmode_r(void)
 {
-	return 0x0000000c;
+	return 0x0000000cU;
 }
 static inline u32 falcon_falcon_irqmset_r(void)
 {
-	return 0x00000010;
+	return 0x00000010U;
 }
 static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqmset_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqmset_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqmset_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqmclr_r(void)
 {
-	return 0x00000014;
+	return 0x00000014U;
 }
 static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqmclr_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqmclr_ext_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_irqmask_r(void)
 {
-	return 0x00000018;
+	return 0x00000018U;
 }
 static inline u32 falcon_falcon_irqdest_r(void)
 {
-	return 0x0000001c;
+	return 0x0000001cU;
 }
 static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 16;
+	return (v & 0x1U) << 16U;
 }
 static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 17;
+	return (v & 0x1U) << 17U;
 }
 static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v)
 {
-	return (v & 0x1) << 18;
+	return (v & 0x1U) << 18U;
 }
 static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 19;
+	return (v & 0x1U) << 19U;
 }
 static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v)
 {
-	return (v & 0x1) << 20;
+	return (v & 0x1U) << 20U;
 }
 static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v)
 {
-	return (v & 0x1) << 21;
+	return (v & 0x1U) << 21U;
 }
 static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 22;
+	return (v & 0x1U) << 22U;
 }
 static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 23;
+	return (v & 0x1U) << 23U;
 }
 static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v)
 {
-	return (v & 0xff) << 24;
+	return (v & 0xffU) << 24U;
 }
 static inline u32 falcon_falcon_curctx_r(void)
 {
-	return 0x00000050;
+	return 0x00000050U;
 }
 static inline u32 falcon_falcon_nxtctx_r(void)
 {
-	return 0x00000054;
+	return 0x00000054U;
 }
 static inline u32 falcon_falcon_mailbox0_r(void)
 {
-	return 0x00000040;
+	return 0x00000040U;
 }
 static inline u32 falcon_falcon_mailbox1_r(void)
 {
-	return 0x00000044;
+	return 0x00000044U;
 }
 static inline u32 falcon_falcon_itfen_r(void)
 {
-	return 0x00000048;
+	return 0x00000048U;
 }
 static inline u32 falcon_falcon_itfen_ctxen_enable_f(void)
 {
-	return 0x1;
+	return 0x1U;
 }
 static inline u32 falcon_falcon_idlestate_r(void)
 {
-	return 0x0000004c;
+	return 0x0000004cU;
 }
 static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r)
 {
-	return (r >> 0) & 0x1;
+	return (r >> 0U) & 0x1U;
 }
 static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r)
 {
-	return (r >> 1) & 0x7fff;
+	return (r >> 1U) & 0x7fffU;
 }
 static inline u32 falcon_falcon_os_r(void)
 {
-	return 0x00000080;
+	return 0x00000080U;
 }
 static inline u32 falcon_falcon_engctl_r(void)
 {
-	return 0x000000a4;
+	return 0x000000a4U;
 }
 static inline u32 falcon_falcon_cpuctl_r(void)
 {
-	return 0x00000100;
+	return 0x00000100U;
 }
 static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_m(void)
 {
-	return 0x1 << 4;
+	return 0x1U << 4U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r)
 {
-	return (r >> 4) & 0x1;
+	return (r >> 4U) & 0x1U;
 }
 static inline u32 falcon_falcon_cpuctl_stopped_m(void)
 {
-	return 0x1 << 5;
+	return 0x1U << 5U;
 }
 static inline u32 falcon_falcon_imemc_r(u32 i)
 {
-	return 0x00000180 + i*16;
+	return 0x00000180U + i*16U;
 }
 static inline u32 falcon_falcon_imemc_offs_f(u32 v)
 {
-	return (v & 0x3f) << 2;
+	return (v & 0x3fU) << 2U;
 }
 static inline u32 falcon_falcon_imemc_blk_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_imemc_aincw_f(u32 v)
 {
-	return (v & 0x1) << 24;
+	return (v & 0x1U) << 24U;
 }
 static inline u32 falcon_falcon_imemd_r(u32 i)
 {
-	return 0x00000184 + i*16;
+	return 0x00000184U + i*16U;
 }
 static inline u32 falcon_falcon_imemt_r(u32 i)
 {
-	return 0x00000188 + i*16;
+	return 0x00000188U + i*16U;
 }
 static inline u32 falcon_falcon_bootvec_r(void)
 {
-	return 0x00000104;
+	return 0x00000104U;
 }
 static inline u32 falcon_falcon_bootvec_vec_f(u32 v)
 {
-	return (v & 0xffffffff) << 0;
+	return (v & 0xffffffffU) << 0U;
 }
 static inline u32 falcon_falcon_dmactl_r(void)
 {
-	return 0x0000010c;
+	return 0x0000010cU;
 }
 static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void)
 {
-	return 0x1 << 1;
+	return 0x1U << 1U;
 }
 static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void)
 {
-	return 0x1 << 2;
+	return 0x1U << 2U;
 }
 static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_hwcfg_r(void)
 {
-	return 0x00000108;
+	return 0x00000108U;
 }
 static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r)
 {
-	return (r >> 0) & 0x1ff;
+	return (r >> 0U) & 0x1ffU;
 }
 static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r)
 {
-	return (r >> 9) & 0x1ff;
+	return (r >> 9U) & 0x1ffU;
 }
 static inline u32 falcon_falcon_dmatrfbase_r(void)
 {
-	return 0x00000110;
+	return 0x00000110U;
 }
 static inline u32 falcon_falcon_dmatrfmoffs_r(void)
 {
-	return 0x00000114;
+	return 0x00000114U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_r(void)
 {
-	return 0x00000118;
+	return 0x00000118U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v)
 {
-	return (v & 0x7) << 8;
+	return (v & 0x7U) << 8U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v)
 {
-	return (v & 0x7) << 12;
+	return (v & 0x7U) << 12U;
 }
 static inline u32 falcon_falcon_dmatrffboffs_r(void)
 {
-	return 0x0000011c;
+	return 0x0000011cU;
 }
 static inline u32 falcon_falcon_imstat_r(void)
 {
-	return 0x00000144;
+	return 0x00000144U;
 }
 static inline u32 falcon_falcon_traceidx_r(void)
 {
-	return 0x00000148;
+	return 0x00000148U;
 }
 static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r)
 {
-	return (r >> 16) & 0xff;
+	return (r >> 16U) & 0xffU;
 }
 static inline u32 falcon_falcon_traceidx_idx_v(u32 r)
 {
-	return (r >> 0) & 0xff;
+	return (r >> 0U) & 0xffU;
 }
 static inline u32 falcon_falcon_tracepc_r(void)
 {
-	return 0x0000014c;
+	return 0x0000014cU;
 }
 static inline u32 falcon_falcon_tracepc_pc_v(u32 r)
 {
-	return (r >> 0) & 0xffffff;
+	return (r >> 0U) & 0xffffffU;
 }
 static inline u32 falcon_falcon_exterraddr_r(void)
 {
-	return 0x00000168;
+	return 0x00000168U;
 }
 static inline u32 falcon_falcon_exterrstat_r(void)
 {
-	return 0x0000016c;
+	return 0x0000016cU;
 }
 static inline u32 falcon_falcon_exterrstat_valid_m(void)
 {
-	return 0x1 << 31;
+	return 0x1U << 31U;
 }
 static inline u32 falcon_falcon_exterrstat_valid_v(u32 r)
 {
-	return (r >> 31) & 0x1;
+	return (r >> 31U) & 0x1U;
 }
 static inline u32 falcon_falcon_exterrstat_valid_true_v(void)
 {
-	return 0x00000001;
+	return 0x00000001U;
 }
 static inline u32 falcon_falcon_icd_cmd_r(void)
 {
-	return 0x00000200;
+	return 0x00000200U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_s(void)
 {
-	return 4;
+	return 4U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v)
 {
-	return (v & 0xf) << 0;
+	return (v & 0xfU) << 0U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_m(void)
 {
-	return 0xf << 0;
+	return 0xfU << 0U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r)
 {
-	return (r >> 0) & 0xf;
+	return (r >> 0U) & 0xfU;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void)
 {
-	return 0x8;
+	return 0x8U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void)
 {
-	return 0xe;
+	return 0xeU;
 }
 static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v)
 {
-	return (v & 0x1f) << 8;
+	return (v & 0x1fU) << 8U;
 }
 static inline u32 falcon_falcon_icd_rdata_r(void)
 {
-	return 0x0000020c;
+	return 0x0000020cU;
 }
 static inline u32 falcon_falcon_dmemc_r(u32 i)
 {
-	return 0x000001c0 + i*8;
+	return 0x000001c0U + i*8U;
 }
 static inline u32 falcon_falcon_dmemc_offs_f(u32 v)
 {
-	return (v & 0x3f) << 2;
+	return (v & 0x3fU) << 2U;
 }
 static inline u32 falcon_falcon_dmemc_offs_m(void)
 {
-	return 0x3f << 2;
+	return 0x3fU << 2U;
 }
 static inline u32 falcon_falcon_dmemc_blk_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_dmemc_blk_m(void)
 {
-	return 0xff << 8;
+	return 0xffU << 8U;
 }
 static inline u32 falcon_falcon_dmemc_aincw_f(u32 v)
 {
-	return (v & 0x1) << 24;
+	return (v & 0x1U) << 24U;
 }
 static inline u32 falcon_falcon_dmemc_aincr_f(u32 v)
 {
-	return (v & 0x1) << 25;
+	return (v & 0x1U) << 25U;
 }
 static inline u32 falcon_falcon_dmemd_r(u32 i)
 {
-	return 0x000001c4 + i*8;
+	return 0x000001c4U + i*8U;
 }
 static inline u32 falcon_falcon_debug1_r(void)
 {
-	return 0x00000090;
+	return 0x00000090U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void)
 {
-	return 1;
+	return 1U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v)
 {
-	return (v & 0x1) << 16;
+	return (v & 0x1U) << 16U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void)
 {
-	return 0x1 << 16;
+	return 0x1U << 16U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r)
 {
-	return (r >> 16) & 0x1;
+	return (r >> 16U) & 0x1U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void)
 {
-	return 0x0;
+	return 0x0U;
 }
 static inline u32 falcon_falcon_debuginfo_r(void)
 {
-	return 0x00000094;
+	return 0x00000094U;
 }
 #endif

drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_falcon_gm20b.h

@@ -58,538 +58,538 @@
 
 static inline u32 falcon_falcon_irqsset_r(void)
 {
-	return 0x00000000;
+	return 0x00000000U;
 }
 static inline u32 falcon_falcon_irqsset_swgen0_set_f(void)
 {
-	return 0x40;
+	return 0x40U;
 }
 static inline u32 falcon_falcon_irqsclr_r(void)
 {
-	return 0x00000004;
+	return 0x00000004U;
 }
 static inline u32 falcon_falcon_irqstat_r(void)
 {
-	return 0x00000008;
+	return 0x00000008U;
 }
 static inline u32 falcon_falcon_irqstat_halt_true_f(void)
 {
-	return 0x10;
+	return 0x10U;
 }
 static inline u32 falcon_falcon_irqstat_exterr_true_f(void)
 {
-	return 0x20;
+	return 0x20U;
 }
 static inline u32 falcon_falcon_irqstat_swgen0_true_f(void)
 {
-	return 0x40;
+	return 0x40U;
 }
 static inline u32 falcon_falcon_irqmode_r(void)
 {
-	return 0x0000000c;
+	return 0x0000000cU;
 }
 static inline u32 falcon_falcon_irqmset_r(void)
 {
-	return 0x00000010;
+	return 0x00000010U;
 }
 static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqmset_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqmset_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqmset_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqmclr_r(void)
 {
-	return 0x00000014;
+	return 0x00000014U;
 }
 static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqmclr_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqmclr_ext_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_irqmask_r(void)
 {
-	return 0x00000018;
+	return 0x00000018U;
 }
 static inline u32 falcon_falcon_irqdest_r(void)
 {
-	return 0x0000001c;
+	return 0x0000001cU;
 }
 static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 16;
+	return (v & 0x1U) << 16U;
 }
 static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 17;
+	return (v & 0x1U) << 17U;
 }
 static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v)
 {
-	return (v & 0x1) << 18;
+	return (v & 0x1U) << 18U;
 }
 static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 19;
+	return (v & 0x1U) << 19U;
 }
 static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v)
 {
-	return (v & 0x1) << 20;
+	return (v & 0x1U) << 20U;
 }
 static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v)
 {
-	return (v & 0x1) << 21;
+	return (v & 0x1U) << 21U;
 }
 static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 22;
+	return (v & 0x1U) << 22U;
 }
 static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 23;
+	return (v & 0x1U) << 23U;
 }
 static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v)
 {
-	return (v & 0xff) << 24;
+	return (v & 0xffU) << 24U;
 }
 static inline u32 falcon_falcon_curctx_r(void)
 {
-	return 0x00000050;
+	return 0x00000050U;
 }
 static inline u32 falcon_falcon_nxtctx_r(void)
 {
-	return 0x00000054;
+	return 0x00000054U;
 }
 static inline u32 falcon_falcon_mailbox0_r(void)
 {
-	return 0x00000040;
+	return 0x00000040U;
 }
 static inline u32 falcon_falcon_mailbox1_r(void)
 {
-	return 0x00000044;
+	return 0x00000044U;
 }
 static inline u32 falcon_falcon_itfen_r(void)
 {
-	return 0x00000048;
+	return 0x00000048U;
 }
 static inline u32 falcon_falcon_itfen_ctxen_enable_f(void)
 {
-	return 0x1;
+	return 0x1U;
 }
 static inline u32 falcon_falcon_idlestate_r(void)
 {
-	return 0x0000004c;
+	return 0x0000004cU;
 }
 static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r)
 {
-	return (r >> 0) & 0x1;
+	return (r >> 0U) & 0x1U;
 }
 static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r)
 {
-	return (r >> 1) & 0x7fff;
+	return (r >> 1U) & 0x7fffU;
 }
 static inline u32 falcon_falcon_os_r(void)
 {
-	return 0x00000080;
+	return 0x00000080U;
 }
 static inline u32 falcon_falcon_engctl_r(void)
 {
-	return 0x000000a4;
+	return 0x000000a4U;
 }
 static inline u32 falcon_falcon_cpuctl_r(void)
 {
-	return 0x00000100;
+	return 0x00000100U;
 }
 static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_m(void)
 {
-	return 0x1 << 4;
+	return 0x1U << 4U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r)
 {
-	return (r >> 4) & 0x1;
+	return (r >> 4U) & 0x1U;
 }
 static inline u32 falcon_falcon_cpuctl_stopped_m(void)
 {
-	return 0x1 << 5;
+	return 0x1U << 5U;
 }
 static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_m(void)
 {
-	return 0x1 << 6;
+	return 0x1U << 6U;
 }
 static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_v(u32 r)
 {
-	return (r >> 6) & 0x1;
+	return (r >> 6U) & 0x1U;
 }
 static inline u32 falcon_falcon_cpuctl_alias_r(void)
 {
-	return 0x00000130;
+	return 0x00000130U;
 }
 static inline u32 falcon_falcon_cpuctl_alias_startcpu_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_imemc_r(u32 i)
 {
-	return 0x00000180 + i*16;
+	return 0x00000180U + i*16U;
 }
 static inline u32 falcon_falcon_imemc_offs_f(u32 v)
 {
-	return (v & 0x3f) << 2;
+	return (v & 0x3fU) << 2U;
 }
 static inline u32 falcon_falcon_imemc_blk_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_imemc_aincw_f(u32 v)
 {
-	return (v & 0x1) << 24;
+	return (v & 0x1U) << 24U;
 }
 static inline u32 falcon_falcon_imemd_r(u32 i)
 {
-	return 0x00000184 + i*16;
+	return 0x00000184U + i*16U;
 }
 static inline u32 falcon_falcon_imemt_r(u32 i)
 {
-	return 0x00000188 + i*16;
+	return 0x00000188U + i*16U;
 }
 static inline u32 falcon_falcon_sctl_r(void)
 {
-	return 0x00000240;
+	return 0x00000240U;
 }
 static inline u32 falcon_falcon_mmu_phys_sec_r(void)
 {
-	return 0x00100ce4;
+	return 0x00100ce4U;
 }
 static inline u32 falcon_falcon_bootvec_r(void)
 {
-	return 0x00000104;
+	return 0x00000104U;
 }
 static inline u32 falcon_falcon_bootvec_vec_f(u32 v)
 {
-	return (v & 0xffffffff) << 0;
+	return (v & 0xffffffffU) << 0U;
 }
 static inline u32 falcon_falcon_dmactl_r(void)
 {
-	return 0x0000010c;
+	return 0x0000010cU;
 }
 static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void)
 {
-	return 0x1 << 1;
+	return 0x1U << 1U;
 }
 static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void)
 {
-	return 0x1 << 2;
+	return 0x1U << 2U;
 }
 static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_hwcfg_r(void)
 {
-	return 0x00000108;
+	return 0x00000108U;
 }
 static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r)
 {
-	return (r >> 0) & 0x1ff;
+	return (r >> 0U) & 0x1ffU;
 }
 static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r)
 {
-	return (r >> 9) & 0x1ff;
+	return (r >> 9U) & 0x1ffU;
 }
 static inline u32 falcon_falcon_dmatrfbase_r(void)
 {
-	return 0x00000110;
+	return 0x00000110U;
 }
 static inline u32 falcon_falcon_dmatrfmoffs_r(void)
 {
-	return 0x00000114;
+	return 0x00000114U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_r(void)
 {
-	return 0x00000118;
+	return 0x00000118U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v)
 {
-	return (v & 0x7) << 8;
+	return (v & 0x7U) << 8U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v)
 {
-	return (v & 0x7) << 12;
+	return (v & 0x7U) << 12U;
 }
 static inline u32 falcon_falcon_dmatrffboffs_r(void)
 {
-	return 0x0000011c;
+	return 0x0000011cU;
 }
 static inline u32 falcon_falcon_imctl_debug_r(void)
 {
-	return 0x0000015c;
+	return 0x0000015cU;
 }
 static inline u32 falcon_falcon_imctl_debug_addr_blk_f(u32 v)
 {
-	return (v & 0xffffff) << 0;
+	return (v & 0xffffffU) << 0U;
 }
 static inline u32 falcon_falcon_imctl_debug_cmd_f(u32 v)
 {
-	return (v & 0x7) << 24;
+	return (v & 0x7U) << 24U;
 }
 static inline u32 falcon_falcon_imstat_r(void)
 {
-	return 0x00000144;
+	return 0x00000144U;
 }
 static inline u32 falcon_falcon_traceidx_r(void)
 {
-	return 0x00000148;
+	return 0x00000148U;
 }
 static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r)
 {
-	return (r >> 16) & 0xff;
+	return (r >> 16U) & 0xffU;
 }
 static inline u32 falcon_falcon_traceidx_idx_f(u32 v)
 {
-	return (v & 0xff) << 0;
+	return (v & 0xffU) << 0U;
 }
 static inline u32 falcon_falcon_tracepc_r(void)
 {
-	return 0x0000014c;
+	return 0x0000014cU;
 }
 static inline u32 falcon_falcon_tracepc_pc_v(u32 r)
 {
-	return (r >> 0) & 0xffffff;
+	return (r >> 0U) & 0xffffffU;
 }
 static inline u32 falcon_falcon_exterraddr_r(void)
 {
-	return 0x00000168;
+	return 0x00000168U;
 }
 static inline u32 falcon_falcon_exterrstat_r(void)
 {
-	return 0x0000016c;
+	return 0x0000016cU;
 }
 static inline u32 falcon_falcon_exterrstat_valid_m(void)
 {
-	return 0x1 << 31;
+	return 0x1U << 31U;
 }
 static inline u32 falcon_falcon_exterrstat_valid_v(u32 r)
 {
-	return (r >> 31) & 0x1;
+	return (r >> 31U) & 0x1U;
 }
 static inline u32 falcon_falcon_exterrstat_valid_true_v(void)
 {
-	return 0x00000001;
+	return 0x00000001U;
 }
 static inline u32 falcon_falcon_icd_cmd_r(void)
 {
-	return 0x00000200;
+	return 0x00000200U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_s(void)
 {
-	return 4;
+	return 4U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v)
 {
-	return (v & 0xf) << 0;
+	return (v & 0xfU) << 0U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_m(void)
 {
-	return 0xf << 0;
+	return 0xfU << 0U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r)
 {
-	return (r >> 0) & 0xf;
+	return (r >> 0U) & 0xfU;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void)
 {
-	return 0x8;
+	return 0x8U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void)
 {
-	return 0xe;
+	return 0xeU;
 }
 static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v)
 {
-	return (v & 0x1f) << 8;
+	return (v & 0x1fU) << 8U;
 }
 static inline u32 falcon_falcon_icd_rdata_r(void)
 {
-	return 0x0000020c;
+	return 0x0000020cU;
 }
 static inline u32 falcon_falcon_dmemc_r(u32 i)
 {
-	return 0x000001c0 + i*8;
+	return 0x000001c0U + i*8U;
 }
 static inline u32 falcon_falcon_dmemc_offs_f(u32 v)
 {
-	return (v & 0x3f) << 2;
+	return (v & 0x3fU) << 2U;
 }
 static inline u32 falcon_falcon_dmemc_offs_m(void)
 {
-	return 0x3f << 2;
+	return 0x3fU << 2U;
 }
 static inline u32 falcon_falcon_dmemc_blk_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_dmemc_blk_m(void)
 {
-	return 0xff << 8;
+	return 0xffU << 8U;
 }
 static inline u32 falcon_falcon_dmemc_aincw_f(u32 v)
 {
-	return (v & 0x1) << 24;
+	return (v & 0x1U) << 24U;
 }
 static inline u32 falcon_falcon_dmemc_aincr_f(u32 v)
 {
-	return (v & 0x1) << 25;
+	return (v & 0x1U) << 25U;
 }
 static inline u32 falcon_falcon_dmemd_r(u32 i)
 {
-	return 0x000001c4 + i*8;
+	return 0x000001c4U + i*8U;
 }
 static inline u32 falcon_falcon_debug1_r(void)
 {
-	return 0x00000090;
+	return 0x00000090U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void)
 {
-	return 1;
+	return 1U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v)
 {
-	return (v & 0x1) << 16;
+	return (v & 0x1U) << 16U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void)
 {
-	return 0x1 << 16;
+	return 0x1U << 16U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r)
 {
-	return (r >> 16) & 0x1;
+	return (r >> 16U) & 0x1U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void)
 {
-	return 0x0;
+	return 0x0U;
 }
 static inline u32 falcon_falcon_debuginfo_r(void)
 {
-	return 0x00000094;
+	return 0x00000094U;
 }
 #endif

drivers/gpu/nvgpu/include/nvgpu/hw/gp106/hw_falcon_gp106.h

@@ -58,542 +58,542 @@
 
 static inline u32 falcon_falcon_irqsset_r(void)
 {
-	return 0x00000000;
+	return 0x00000000U;
 }
 static inline u32 falcon_falcon_irqsset_swgen0_set_f(void)
 {
-	return 0x40;
+	return 0x40U;
 }
 static inline u32 falcon_falcon_irqsclr_r(void)
 {
-	return 0x00000004;
+	return 0x00000004U;
 }
 static inline u32 falcon_falcon_irqstat_r(void)
 {
-	return 0x00000008;
+	return 0x00000008U;
 }
 static inline u32 falcon_falcon_irqstat_halt_true_f(void)
 {
-	return 0x10;
+	return 0x10U;
 }
 static inline u32 falcon_falcon_irqstat_exterr_true_f(void)
 {
-	return 0x20;
+	return 0x20U;
 }
 static inline u32 falcon_falcon_irqstat_swgen0_true_f(void)
 {
-	return 0x40;
+	return 0x40U;
 }
 static inline u32 falcon_falcon_irqmode_r(void)
 {
-	return 0x0000000c;
+	return 0x0000000cU;
 }
 static inline u32 falcon_falcon_irqmset_r(void)
 {
-	return 0x00000010;
+	return 0x00000010U;
 }
 static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqmset_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqmset_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqmset_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqmclr_r(void)
 {
-	return 0x00000014;
+	return 0x00000014U;
 }
 static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqmclr_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqmclr_ext_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_irqmask_r(void)
 {
-	return 0x00000018;
+	return 0x00000018U;
 }
 static inline u32 falcon_falcon_irqdest_r(void)
 {
-	return 0x0000001c;
+	return 0x0000001cU;
 }
 static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 16;
+	return (v & 0x1U) << 16U;
 }
 static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 17;
+	return (v & 0x1U) << 17U;
 }
 static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v)
 {
-	return (v & 0x1) << 18;
+	return (v & 0x1U) << 18U;
 }
 static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 19;
+	return (v & 0x1U) << 19U;
 }
 static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v)
 {
-	return (v & 0x1) << 20;
+	return (v & 0x1U) << 20U;
 }
 static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v)
 {
-	return (v & 0x1) << 21;
+	return (v & 0x1U) << 21U;
 }
 static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 22;
+	return (v & 0x1U) << 22U;
 }
 static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 23;
+	return (v & 0x1U) << 23U;
 }
 static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v)
 {
-	return (v & 0xff) << 24;
+	return (v & 0xffU) << 24U;
 }
 static inline u32 falcon_falcon_curctx_r(void)
 {
-	return 0x00000050;
+	return 0x00000050U;
 }
 static inline u32 falcon_falcon_nxtctx_r(void)
 {
-	return 0x00000054;
+	return 0x00000054U;
 }
 static inline u32 falcon_falcon_mailbox0_r(void)
 {
-	return 0x00000040;
+	return 0x00000040U;
 }
 static inline u32 falcon_falcon_mailbox1_r(void)
 {
-	return 0x00000044;
+	return 0x00000044U;
 }
 static inline u32 falcon_falcon_itfen_r(void)
 {
-	return 0x00000048;
+	return 0x00000048U;
 }
 static inline u32 falcon_falcon_itfen_ctxen_enable_f(void)
 {
-	return 0x1;
+	return 0x1U;
 }
 static inline u32 falcon_falcon_idlestate_r(void)
 {
-	return 0x0000004c;
+	return 0x0000004cU;
 }
 static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r)
 {
-	return (r >> 0) & 0x1;
+	return (r >> 0U) & 0x1U;
 }
 static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r)
 {
-	return (r >> 1) & 0x7fff;
+	return (r >> 1U) & 0x7fffU;
 }
 static inline u32 falcon_falcon_os_r(void)
 {
-	return 0x00000080;
+	return 0x00000080U;
 }
 static inline u32 falcon_falcon_engctl_r(void)
 {
-	return 0x000000a4;
+	return 0x000000a4U;
 }
 static inline u32 falcon_falcon_cpuctl_r(void)
 {
-	return 0x00000100;
+	return 0x00000100U;
 }
 static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_m(void)
 {
-	return 0x1 << 4;
+	return 0x1U << 4U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r)
 {
-	return (r >> 4) & 0x1;
+	return (r >> 4U) & 0x1U;
 }
 static inline u32 falcon_falcon_cpuctl_stopped_m(void)
 {
-	return 0x1 << 5;
+	return 0x1U << 5U;
 }
 static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_m(void)
 {
-	return 0x1 << 6;
+	return 0x1U << 6U;
 }
 static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_v(u32 r)
 {
-	return (r >> 6) & 0x1;
+	return (r >> 6U) & 0x1U;
 }
 static inline u32 falcon_falcon_cpuctl_alias_r(void)
 {
-	return 0x00000130;
+	return 0x00000130U;
 }
 static inline u32 falcon_falcon_cpuctl_alias_startcpu_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_imemc_r(u32 i)
 {
-	return 0x00000180 + i*16;
+	return 0x00000180U + i*16U;
 }
 static inline u32 falcon_falcon_imemc_offs_f(u32 v)
 {
-	return (v & 0x3f) << 2;
+	return (v & 0x3fU) << 2U;
 }
 static inline u32 falcon_falcon_imemc_blk_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_imemc_aincw_f(u32 v)
 {
-	return (v & 0x1) << 24;
+	return (v & 0x1U) << 24U;
 }
 static inline u32 falcon_falcon_imemd_r(u32 i)
 {
-	return 0x00000184 + i*16;
+	return 0x00000184U + i*16U;
 }
 static inline u32 falcon_falcon_imemt_r(u32 i)
 {
-	return 0x00000188 + i*16;
+	return 0x00000188U + i*16U;
 }
 static inline u32 falcon_falcon_sctl_r(void)
 {
-	return 0x00000240;
+	return 0x00000240U;
 }
 static inline u32 falcon_falcon_mmu_phys_sec_r(void)
 {
-	return 0x00100ce4;
+	return 0x00100ce4U;
 }
 static inline u32 falcon_falcon_bootvec_r(void)
 {
-	return 0x00000104;
+	return 0x00000104U;
 }
 static inline u32 falcon_falcon_bootvec_vec_f(u32 v)
 {
-	return (v & 0xffffffff) << 0;
+	return (v & 0xffffffffU) << 0U;
 }
 static inline u32 falcon_falcon_dmactl_r(void)
 {
-	return 0x0000010c;
+	return 0x0000010cU;
 }
 static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void)
 {
-	return 0x1 << 1;
+	return 0x1U << 1U;
 }
 static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void)
 {
-	return 0x1 << 2;
+	return 0x1U << 2U;
 }
 static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_hwcfg_r(void)
 {
-	return 0x00000108;
+	return 0x00000108U;
 }
 static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r)
 {
-	return (r >> 0) & 0x1ff;
+	return (r >> 0U) & 0x1ffU;
 }
 static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r)
 {
-	return (r >> 9) & 0x1ff;
+	return (r >> 9U) & 0x1ffU;
 }
 static inline u32 falcon_falcon_dmatrfbase_r(void)
 {
-	return 0x00000110;
+	return 0x00000110U;
 }
 static inline u32 falcon_falcon_dmatrfbase1_r(void)
 {
-	return 0x00000128;
+	return 0x00000128U;
 }
 static inline u32 falcon_falcon_dmatrfmoffs_r(void)
 {
-	return 0x00000114;
+	return 0x00000114U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_r(void)
 {
-	return 0x00000118;
+	return 0x00000118U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v)
 {
-	return (v & 0x7) << 8;
+	return (v & 0x7U) << 8U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v)
 {
-	return (v & 0x7) << 12;
+	return (v & 0x7U) << 12U;
 }
 static inline u32 falcon_falcon_dmatrffboffs_r(void)
 {
-	return 0x0000011c;
+	return 0x0000011cU;
 }
 static inline u32 falcon_falcon_imctl_debug_r(void)
 {
-	return 0x0000015c;
+	return 0x0000015cU;
 }
 static inline u32 falcon_falcon_imctl_debug_addr_blk_f(u32 v)
 {
-	return (v & 0xffffff) << 0;
+	return (v & 0xffffffU) << 0U;
 }
 static inline u32 falcon_falcon_imctl_debug_cmd_f(u32 v)
 {
-	return (v & 0x7) << 24;
+	return (v & 0x7U) << 24U;
 }
 static inline u32 falcon_falcon_imstat_r(void)
 {
-	return 0x00000144;
+	return 0x00000144U;
 }
 static inline u32 falcon_falcon_traceidx_r(void)
 {
-	return 0x00000148;
+	return 0x00000148U;
 }
 static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r)
 {
-	return (r >> 16) & 0xff;
+	return (r >> 16U) & 0xffU;
 }
 static inline u32 falcon_falcon_traceidx_idx_f(u32 v)
 {
-	return (v & 0xff) << 0;
+	return (v & 0xffU) << 0U;
 }
 static inline u32 falcon_falcon_tracepc_r(void)
 {
-	return 0x0000014c;
+	return 0x0000014cU;
 }
 static inline u32 falcon_falcon_tracepc_pc_v(u32 r)
 {
-	return (r >> 0) & 0xffffff;
+	return (r >> 0U) & 0xffffffU;
 }
 static inline u32 falcon_falcon_exterraddr_r(void)
 {
-	return 0x00000168;
+	return 0x00000168U;
 }
 static inline u32 falcon_falcon_exterrstat_r(void)
 {
-	return 0x0000016c;
+	return 0x0000016cU;
 }
 static inline u32 falcon_falcon_exterrstat_valid_m(void)
 {
-	return 0x1 << 31;
+	return 0x1U << 31U;
 }
 static inline u32 falcon_falcon_exterrstat_valid_v(u32 r)
 {
-	return (r >> 31) & 0x1;
+	return (r >> 31U) & 0x1U;
 }
 static inline u32 falcon_falcon_exterrstat_valid_true_v(void)
 {
-	return 0x00000001;
+	return 0x00000001U;
 }
 static inline u32 falcon_falcon_icd_cmd_r(void)
 {
-	return 0x00000200;
+	return 0x00000200U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_s(void)
 {
-	return 4;
+	return 4U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v)
 {
-	return (v & 0xf) << 0;
+	return (v & 0xfU) << 0U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_m(void)
 {
-	return 0xf << 0;
+	return 0xfU << 0U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r)
 {
-	return (r >> 0) & 0xf;
+	return (r >> 0U) & 0xfU;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void)
 {
-	return 0x8;
+	return 0x8U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void)
 {
-	return 0xe;
+	return 0xeU;
 }
 static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v)
 {
-	return (v & 0x1f) << 8;
+	return (v & 0x1fU) << 8U;
 }
 static inline u32 falcon_falcon_icd_rdata_r(void)
 {
-	return 0x0000020c;
+	return 0x0000020cU;
 }
 static inline u32 falcon_falcon_dmemc_r(u32 i)
 {
-	return 0x000001c0 + i*8;
+	return 0x000001c0U + i*8U;
 }
 static inline u32 falcon_falcon_dmemc_offs_f(u32 v)
 {
-	return (v & 0x3f) << 2;
+	return (v & 0x3fU) << 2U;
 }
 static inline u32 falcon_falcon_dmemc_offs_m(void)
 {
-	return 0x3f << 2;
+	return 0x3fU << 2U;
 }
 static inline u32 falcon_falcon_dmemc_blk_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_dmemc_blk_m(void)
 {
-	return 0xff << 8;
+	return 0xffU << 8U;
 }
 static inline u32 falcon_falcon_dmemc_aincw_f(u32 v)
 {
-	return (v & 0x1) << 24;
+	return (v & 0x1U) << 24U;
 }
 static inline u32 falcon_falcon_dmemc_aincr_f(u32 v)
 {
-	return (v & 0x1) << 25;
+	return (v & 0x1U) << 25U;
 }
 static inline u32 falcon_falcon_dmemd_r(u32 i)
 {
-	return 0x000001c4 + i*8;
+	return 0x000001c4U + i*8U;
 }
 static inline u32 falcon_falcon_debug1_r(void)
 {
-	return 0x00000090;
+	return 0x00000090U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void)
 {
-	return 1;
+	return 1U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v)
 {
-	return (v & 0x1) << 16;
+	return (v & 0x1U) << 16U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void)
 {
-	return 0x1 << 16;
+	return 0x1U << 16U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r)
 {
-	return (r >> 16) & 0x1;
+	return (r >> 16U) & 0x1U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void)
 {
-	return 0x0;
+	return 0x0U;
 }
 static inline u32 falcon_falcon_debuginfo_r(void)
 {
-	return 0x00000094;
+	return 0x00000094U;
 }
 #endif

drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_falcon_gp10b.h

@@ -58,542 +58,542 @@
 
 static inline u32 falcon_falcon_irqsset_r(void)
 {
-	return 0x00000000;
+	return 0x00000000U;
 }
 static inline u32 falcon_falcon_irqsset_swgen0_set_f(void)
 {
-	return 0x40;
+	return 0x40U;
 }
 static inline u32 falcon_falcon_irqsclr_r(void)
 {
-	return 0x00000004;
+	return 0x00000004U;
 }
 static inline u32 falcon_falcon_irqstat_r(void)
 {
-	return 0x00000008;
+	return 0x00000008U;
 }
 static inline u32 falcon_falcon_irqstat_halt_true_f(void)
 {
-	return 0x10;
+	return 0x10U;
 }
 static inline u32 falcon_falcon_irqstat_exterr_true_f(void)
 {
-	return 0x20;
+	return 0x20U;
 }
 static inline u32 falcon_falcon_irqstat_swgen0_true_f(void)
 {
-	return 0x40;
+	return 0x40U;
 }
 static inline u32 falcon_falcon_irqmode_r(void)
 {
-	return 0x0000000c;
+	return 0x0000000cU;
 }
 static inline u32 falcon_falcon_irqmset_r(void)
 {
-	return 0x00000010;
+	return 0x00000010U;
 }
 static inline u32 falcon_falcon_irqmset_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqmset_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqmset_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqmset_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqmset_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqmset_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqmset_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqmset_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqmclr_r(void)
 {
-	return 0x00000014;
+	return 0x00000014U;
 }
 static inline u32 falcon_falcon_irqmclr_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqmclr_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqmclr_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqmclr_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqmclr_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqmclr_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqmclr_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqmclr_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqmclr_ext_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_irqmask_r(void)
 {
-	return 0x00000018;
+	return 0x00000018U;
 }
 static inline u32 falcon_falcon_irqdest_r(void)
 {
-	return 0x0000001c;
+	return 0x0000001cU;
 }
 static inline u32 falcon_falcon_irqdest_host_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_irqdest_host_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_irqdest_host_mthd_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_irqdest_host_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_irqdest_host_halt_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_irqdest_host_exterr_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_irqdest_host_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_irqdest_host_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 7;
+	return (v & 0x1U) << 7U;
 }
 static inline u32 falcon_falcon_irqdest_host_ext_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_irqdest_target_gptmr_f(u32 v)
 {
-	return (v & 0x1) << 16;
+	return (v & 0x1U) << 16U;
 }
 static inline u32 falcon_falcon_irqdest_target_wdtmr_f(u32 v)
 {
-	return (v & 0x1) << 17;
+	return (v & 0x1U) << 17U;
 }
 static inline u32 falcon_falcon_irqdest_target_mthd_f(u32 v)
 {
-	return (v & 0x1) << 18;
+	return (v & 0x1U) << 18U;
 }
 static inline u32 falcon_falcon_irqdest_target_ctxsw_f(u32 v)
 {
-	return (v & 0x1) << 19;
+	return (v & 0x1U) << 19U;
 }
 static inline u32 falcon_falcon_irqdest_target_halt_f(u32 v)
 {
-	return (v & 0x1) << 20;
+	return (v & 0x1U) << 20U;
 }
 static inline u32 falcon_falcon_irqdest_target_exterr_f(u32 v)
 {
-	return (v & 0x1) << 21;
+	return (v & 0x1U) << 21U;
 }
 static inline u32 falcon_falcon_irqdest_target_swgen0_f(u32 v)
 {
-	return (v & 0x1) << 22;
+	return (v & 0x1U) << 22U;
 }
 static inline u32 falcon_falcon_irqdest_target_swgen1_f(u32 v)
 {
-	return (v & 0x1) << 23;
+	return (v & 0x1U) << 23U;
 }
 static inline u32 falcon_falcon_irqdest_target_ext_f(u32 v)
 {
-	return (v & 0xff) << 24;
+	return (v & 0xffU) << 24U;
 }
 static inline u32 falcon_falcon_curctx_r(void)
 {
-	return 0x00000050;
+	return 0x00000050U;
 }
 static inline u32 falcon_falcon_nxtctx_r(void)
 {
-	return 0x00000054;
+	return 0x00000054U;
 }
 static inline u32 falcon_falcon_mailbox0_r(void)
 {
-	return 0x00000040;
+	return 0x00000040U;
 }
 static inline u32 falcon_falcon_mailbox1_r(void)
 {
-	return 0x00000044;
+	return 0x00000044U;
 }
 static inline u32 falcon_falcon_itfen_r(void)
 {
-	return 0x00000048;
+	return 0x00000048U;
 }
 static inline u32 falcon_falcon_itfen_ctxen_enable_f(void)
 {
-	return 0x1;
+	return 0x1U;
 }
 static inline u32 falcon_falcon_idlestate_r(void)
 {
-	return 0x0000004c;
+	return 0x0000004cU;
 }
 static inline u32 falcon_falcon_idlestate_falcon_busy_v(u32 r)
 {
-	return (r >> 0) & 0x1;
+	return (r >> 0U) & 0x1U;
 }
 static inline u32 falcon_falcon_idlestate_ext_busy_v(u32 r)
 {
-	return (r >> 1) & 0x7fff;
+	return (r >> 1U) & 0x7fffU;
 }
 static inline u32 falcon_falcon_os_r(void)
 {
-	return 0x00000080;
+	return 0x00000080U;
 }
 static inline u32 falcon_falcon_engctl_r(void)
 {
-	return 0x000000a4;
+	return 0x000000a4U;
 }
 static inline u32 falcon_falcon_cpuctl_r(void)
 {
-	return 0x00000100;
+	return 0x00000100U;
 }
 static inline u32 falcon_falcon_cpuctl_startcpu_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_cpuctl_sreset_f(u32 v)
 {
-	return (v & 0x1) << 2;
+	return (v & 0x1U) << 2U;
 }
 static inline u32 falcon_falcon_cpuctl_hreset_f(u32 v)
 {
-	return (v & 0x1) << 3;
+	return (v & 0x1U) << 3U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_m(void)
 {
-	return 0x1 << 4;
+	return 0x1U << 4U;
 }
 static inline u32 falcon_falcon_cpuctl_halt_intr_v(u32 r)
 {
-	return (r >> 4) & 0x1;
+	return (r >> 4U) & 0x1U;
 }
 static inline u32 falcon_falcon_cpuctl_stopped_m(void)
 {
-	return 0x1 << 5;
+	return 0x1U << 5U;
 }
 static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_f(u32 v)
 {
-	return (v & 0x1) << 6;
+	return (v & 0x1U) << 6U;
 }
 static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_m(void)
 {
-	return 0x1 << 6;
+	return 0x1U << 6U;
 }
 static inline u32 falcon_falcon_cpuctl_cpuctl_alias_en_v(u32 r)
 {
-	return (r >> 6) & 0x1;
+	return (r >> 6U) & 0x1U;
 }
 static inline u32 falcon_falcon_cpuctl_alias_r(void)
 {
-	return 0x00000130;
+	return 0x00000130U;
 }
 static inline u32 falcon_falcon_cpuctl_alias_startcpu_f(u32 v)
 {
-	return (v & 0x1) << 1;
+	return (v & 0x1U) << 1U;
 }
 static inline u32 falcon_falcon_imemc_r(u32 i)
 {
-	return 0x00000180 + i*16;
+	return 0x00000180U + i*16U;
 }
 static inline u32 falcon_falcon_imemc_offs_f(u32 v)
 {
-	return (v & 0x3f) << 2;
+	return (v & 0x3fU) << 2U;
 }
 static inline u32 falcon_falcon_imemc_blk_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_imemc_aincw_f(u32 v)
 {
-	return (v & 0x1) << 24;
+	return (v & 0x1U) << 24U;
 }
 static inline u32 falcon_falcon_imemd_r(u32 i)
 {
-	return 0x00000184 + i*16;
+	return 0x00000184U + i*16U;
 }
 static inline u32 falcon_falcon_imemt_r(u32 i)
 {
-	return 0x00000188 + i*16;
+	return 0x00000188U + i*16U;
 }
 static inline u32 falcon_falcon_sctl_r(void)
 {
-	return 0x00000240;
+	return 0x00000240U;
 }
 static inline u32 falcon_falcon_mmu_phys_sec_r(void)
 {
-	return 0x00100ce4;
+	return 0x00100ce4U;
 }
 static inline u32 falcon_falcon_bootvec_r(void)
 {
-	return 0x00000104;
+	return 0x00000104U;
 }
 static inline u32 falcon_falcon_bootvec_vec_f(u32 v)
 {
-	return (v & 0xffffffff) << 0;
+	return (v & 0xffffffffU) << 0U;
 }
 static inline u32 falcon_falcon_dmactl_r(void)
 {
-	return 0x0000010c;
+	return 0x0000010cU;
 }
 static inline u32 falcon_falcon_dmactl_dmem_scrubbing_m(void)
 {
-	return 0x1 << 1;
+	return 0x1U << 1U;
 }
 static inline u32 falcon_falcon_dmactl_imem_scrubbing_m(void)
 {
-	return 0x1 << 2;
+	return 0x1U << 2U;
 }
 static inline u32 falcon_falcon_dmactl_require_ctx_f(u32 v)
 {
-	return (v & 0x1) << 0;
+	return (v & 0x1U) << 0U;
 }
 static inline u32 falcon_falcon_hwcfg_r(void)
 {
-	return 0x00000108;
+	return 0x00000108U;
 }
 static inline u32 falcon_falcon_hwcfg_imem_size_v(u32 r)
 {
-	return (r >> 0) & 0x1ff;
+	return (r >> 0U) & 0x1ffU;
 }
 static inline u32 falcon_falcon_hwcfg_dmem_size_v(u32 r)
 {
-	return (r >> 9) & 0x1ff;
+	return (r >> 9U) & 0x1ffU;
 }
 static inline u32 falcon_falcon_dmatrfbase_r(void)
 {
-	return 0x00000110;
+	return 0x00000110U;
 }
 static inline u32 falcon_falcon_dmatrfbase1_r(void)
 {
-	return 0x00000128;
+	return 0x00000128U;
 }
 static inline u32 falcon_falcon_dmatrfmoffs_r(void)
 {
-	return 0x00000114;
+	return 0x00000114U;
 }
 static inline u32 falcon_falcon_imctl_debug_r(void)
 {
-	return 0x0000015c;
+	return 0x0000015cU;
 }
 static inline u32 falcon_falcon_imctl_debug_addr_blk_f(u32 v)
 {
-	return (v & 0xffffff) << 0;
+	return (v & 0xffffffU) << 0U;
 }
 static inline u32 falcon_falcon_imctl_debug_cmd_f(u32 v)
 {
-	return (v & 0x7) << 24;
+	return (v & 0x7U) << 24U;
 }
 static inline u32 falcon_falcon_imstat_r(void)
 {
-	return 0x00000144;
+	return 0x00000144U;
 }
 static inline u32 falcon_falcon_traceidx_r(void)
 {
-	return 0x00000148;
+	return 0x00000148U;
 }
 static inline u32 falcon_falcon_traceidx_maxidx_v(u32 r)
 {
-	return (r >> 16) & 0xff;
+	return (r >> 16U) & 0xffU;
 }
 static inline u32 falcon_falcon_traceidx_idx_f(u32 v)
 {
-	return (v & 0xff) << 0;
+	return (v & 0xffU) << 0U;
 }
 static inline u32 falcon_falcon_tracepc_r(void)
 {
-	return 0x0000014c;
+	return 0x0000014cU;
 }
 static inline u32 falcon_falcon_tracepc_pc_v(u32 r)
 {
-	return (r >> 0) & 0xffffff;
+	return (r >> 0U) & 0xffffffU;
 }
 static inline u32 falcon_falcon_dmatrfcmd_r(void)
 {
-	return 0x00000118;
+	return 0x00000118U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_imem_f(u32 v)
 {
-	return (v & 0x1) << 4;
+	return (v & 0x1U) << 4U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_write_f(u32 v)
 {
-	return (v & 0x1) << 5;
+	return (v & 0x1U) << 5U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_size_f(u32 v)
 {
-	return (v & 0x7) << 8;
+	return (v & 0x7U) << 8U;
 }
 static inline u32 falcon_falcon_dmatrfcmd_ctxdma_f(u32 v)
 {
-	return (v & 0x7) << 12;
+	return (v & 0x7U) << 12U;
 }
 static inline u32 falcon_falcon_dmatrffboffs_r(void)
 {
-	return 0x0000011c;
+	return 0x0000011cU;
 }
 static inline u32 falcon_falcon_exterraddr_r(void)
 {
-	return 0x00000168;
+	return 0x00000168U;
 }
 static inline u32 falcon_falcon_exterrstat_r(void)
 {
-	return 0x0000016c;
+	return 0x0000016cU;
 }
 static inline u32 falcon_falcon_exterrstat_valid_m(void)
 {
-	return 0x1 << 31;
+	return 0x1U << 31U;
 }
 static inline u32 falcon_falcon_exterrstat_valid_v(u32 r)
 {
-	return (r >> 31) & 0x1;
+	return (r >> 31U) & 0x1U;
 }
 static inline u32 falcon_falcon_exterrstat_valid_true_v(void)
 {
-	return 0x00000001;
+	return 0x00000001U;
 }
 static inline u32 falcon_falcon_icd_cmd_r(void)
 {
-	return 0x00000200;
+	return 0x00000200U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_s(void)
 {
-	return 4;
+	return 4U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_f(u32 v)
 {
-	return (v & 0xf) << 0;
+	return (v & 0xfU) << 0U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_m(void)
 {
-	return 0xf << 0;
+	return 0xfU << 0U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_v(u32 r)
 {
-	return (r >> 0) & 0xf;
+	return (r >> 0U) & 0xfU;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_rreg_f(void)
 {
-	return 0x8;
+	return 0x8U;
 }
 static inline u32 falcon_falcon_icd_cmd_opc_rstat_f(void)
 {
-	return 0xe;
+	return 0xeU;
 }
 static inline u32 falcon_falcon_icd_cmd_idx_f(u32 v)
 {
-	return (v & 0x1f) << 8;
+	return (v & 0x1fU) << 8U;
 }
 static inline u32 falcon_falcon_icd_rdata_r(void)
 {
-	return 0x0000020c;
+	return 0x0000020cU;
 }
 static inline u32 falcon_falcon_dmemc_r(u32 i)
 {
-	return 0x000001c0 + i*8;
+	return 0x000001c0U + i*8U;
 }
 static inline u32 falcon_falcon_dmemc_offs_f(u32 v)
 {
-	return (v & 0x3f) << 2;
+	return (v & 0x3fU) << 2U;
 }
 static inline u32 falcon_falcon_dmemc_offs_m(void)
 {
-	return 0x3f << 2;
+	return 0x3fU << 2U;
 }
 static inline u32 falcon_falcon_dmemc_blk_f(u32 v)
 {
-	return (v & 0xff) << 8;
+	return (v & 0xffU) << 8U;
 }
 static inline u32 falcon_falcon_dmemc_blk_m(void)
 {
-	return 0xff << 8;
+	return 0xffU << 8U;
 }
 static inline u32 falcon_falcon_dmemc_aincw_f(u32 v)
 {
-	return (v & 0x1) << 24;
+	return (v & 0x1U) << 24U;
 }
 static inline u32 falcon_falcon_dmemc_aincr_f(u32 v)
 {
-	return (v & 0x1) << 25;
+	return (v & 0x1U) << 25U;
 }
 static inline u32 falcon_falcon_dmemd_r(u32 i)
 {
-	return 0x000001c4 + i*8;
+	return 0x000001c4U + i*8U;
 }
 static inline u32 falcon_falcon_debug1_r(void)
 {
-	return 0x00000090;
+	return 0x00000090U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_s(void)
 {
-	return 1;
+	return 1U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_f(u32 v)
 {
-	return (v & 0x1) << 16;
+	return (v & 0x1U) << 16U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_m(void)
 {
-	return 0x1 << 16;
+	return 0x1U << 16U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_v(u32 r)
 {
-	return (r >> 16) & 0x1;
+	return (r >> 16U) & 0x1U;
 }
 static inline u32 falcon_falcon_debug1_ctxsw_mode_init_f(void)
 {
-	return 0x0;
+	return 0x0U;
 }
 static inline u32 falcon_falcon_debuginfo_r(void)
 {
-	return 0x00000094;
+	return 0x00000094U;
 }
 #endif