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gpu: nvgpu: update PT lvl array to six levels

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Increase the size of page table level array to index six levels.

Jira NVGPU-9760

Change-Id: I482639fd028ecd504ee8bc313c39f3bd710e81a9
Signed-off-by: Prathap Kumar Valsan <prathapk@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2868918
Reviewed-by: svcacv <svcacv@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit <buildbot_gerritrpt@nvidia.com>
This commit is contained in:
Prathap Kumar Valsan
2023-03-10 06:27:22 +00:00
committed by mobile promotions
parent c6d5fb348c
commit d0ed86ab1e
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/nvgpu/common/mm/gmmu/page_table.c
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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2023, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -482,6 +482,7 @@ static int nvgpu_set_pd_level(struct vm_gk20a *vm,
" ", /* L=2 */
" ", /* L=3 */
" ", /* L=4 */
" ",/* L=5 */
};
nvgpu_gmmu_dbg_v(g, attrs,