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gpu: nvgpu: ACR chip specific file rename

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Currently ACR chip specific sw init files are named as acr_$CHIP.c/h
which adds confusion as ACR HAL files, renamed to acr_sw_$CHIP.c.h
to reflect these files set ACR properties required by ACR ucode to
execute on selected chip.

JIRA NVGPU-2907

Change-Id: I12d8a481480eb89609d1cb73c9f20b24ae10651f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2081633
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2019-03-26 13:01:02 +05:30
committed by mobile promotions
parent c33d9767da
commit d1127afb6d
13 changed files with 76 additions and 44 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/nvgpu/Makefile
View File

@@ -115,11 +115,11 @@ nvgpu-y += \
common/acr/acr_blob_construct_v0.o \
common/acr/acr_blob_construct_v1.o \
common/acr/acr_bootstrap.o \
common/acr/acr_gm20b.o \
common/acr/acr_gp10b.o \
common/acr/acr_gv100.o \
common/acr/acr_gv11b.o \
common/acr/acr_tu104.o \
common/acr/acr_sw_gm20b.o \
common/acr/acr_sw_gp10b.o \
common/acr/acr_sw_gv100.o \
common/acr/acr_sw_gv11b.o \
common/acr/acr_sw_tu104.o \
common/pmu/perf/vfe_var.o \
common/pmu/perf/vfe_equ.o \
common/pmu/perf/pmu_perf.o \

10
drivers/gpu/nvgpu/Makefile.sources
View File

@@ -147,11 +147,11 @@ srcs += common/sim.c \
common/acr/acr_blob_construct_v0.c \
common/acr/acr_blob_construct_v1.c \
common/acr/acr_bootstrap.c \
common/acr/acr_gm20b.c \
common/acr/acr_gp10b.c \
common/acr/acr_gv100.c \
common/acr/acr_gv11b.c \
common/acr/acr_tu104.c \
common/acr/acr_sw_gm20b.c \
common/acr/acr_sw_gp10b.c \
common/acr/acr_sw_gv100.c \
common/acr/acr_sw_gv11b.c \
common/acr/acr_sw_tu104.c \
common/sec2/sec2.c \
common/sec2/sec2_ipc.c \
common/ptimer/ptimer.c \

10
drivers/gpu/nvgpu/common/acr/acr.c
View File

@@ -26,11 +26,11 @@
#include <nvgpu/gk20a.h>
#include "acr_priv.h"
#include "acr_gm20b.h"
#include "acr_gp10b.h"
#include "acr_gv11b.h"
#include "acr_gv100.h"
#include "acr_tu104.h"
#include "acr_sw_gm20b.h"
#include "acr_sw_gp10b.h"
#include "acr_sw_gv100.h"
#include "acr_sw_gv11b.h"
#include "acr_sw_tu104.h"
/* ACR public API's */
bool nvgpu_acr_is_lsf_lazy_bootstrap(struct gk20a *g, struct nvgpu_acr *acr,

4
drivers/gpu/nvgpu/common/acr/acr_gm20b.c → drivers/gpu/nvgpu/common/acr/acr_sw_gm20b.c
View File

@@ -20,6 +20,8 @@
* DEALINGS IN THE SOFTWARE.
*/
#include "acr_sw_gm20b.h"
#include <nvgpu/gk20a.h>
#include <nvgpu/types.h>
#include <nvgpu/firmware.h>
@@ -30,7 +32,7 @@
#include "acr_wpr.h"
#include "acr_priv.h"
#include "acr_gm20b.h"
#include "acr_sw_gm20b.h"
#include "acr_blob_alloc.h"
#include "acr_bootstrap.h"
#include "acr_blob_construct_v0.h"

9
drivers/gpu/nvgpu/common/acr/acr_gm20b.h → drivers/gpu/nvgpu/common/acr/acr_sw_gm20b.h
View File

@@ -22,9 +22,12 @@
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_GM20B_ACR_GM20B_H
#define NVGPU_GM20B_ACR_GM20B_H
#ifndef ACR_SW_GM20B_H
#define ACR_SW_GM20B_H
struct gk20a;
struct nvgpu_acr;
void nvgpu_gm20b_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr);
#endif /*NVGPU_GM20B_ACR_GM20B_H*/
#endif /*ACR_SW_GM20B_H*/

6
drivers/gpu/nvgpu/common/acr/acr_gp10b.c → drivers/gpu/nvgpu/common/acr/acr_sw_gp10b.c
View File

@@ -20,6 +20,8 @@
* DEALINGS IN THE SOFTWARE.
*/
#include "acr_sw_gp10b.h"
#include <nvgpu/types.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/pmu.h>
@@ -27,8 +29,8 @@
#include "acr_blob_construct_v0.h"
#include "acr_priv.h"
#include "acr_gm20b.h"
#include "acr_gp10b.h"
#include "acr_sw_gm20b.h"
#include "acr_sw_gp10b.h"
/* LSF static config functions */
static u32 gp10b_acr_lsf_gpccs(struct gk20a *g,

9
drivers/gpu/nvgpu/common/acr/acr_gp10b.h → drivers/gpu/nvgpu/common/acr/acr_sw_gp10b.h
View File

@@ -20,9 +20,12 @@
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_ACR_GP10B_H
#define NVGPU_ACR_GP10B_H
#ifndef ACR_SW_GP10B_H
#define ACR_SW_GP10B_H
struct gk20a;
struct nvgpu_acr;
void nvgpu_gp10b_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr);
#endif /* NVGPU_ACR_GP10B_H */
#endif /* ACR_SW_GP10B_H */

12
drivers/gpu/nvgpu/common/acr/acr_gv100.c → drivers/gpu/nvgpu/common/acr/acr_sw_gv100.c
View File

@@ -20,13 +20,15 @@
* DEALINGS IN THE SOFTWARE.
*/
#include "acr_sw_gv100.h"
#include <nvgpu/firmware.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/bug.h>
#include "acr_wpr.h"
#include "acr_priv.h"
#include "acr_gv100.h"
#include "acr_sw_gv100.h"
#include "acr_blob_alloc.h"
#include "acr_bootstrap.h"
#include "acr_blob_construct_v1.h"
@@ -39,8 +41,9 @@ static void flcn64_set_dma(struct falc_u64 *dma_addr, u64 value)
dma_addr->hi |= u64_hi32(value);
}
static int gv100_acr_patch_wpr_info_to_ucode(struct gk20a *g, struct nvgpu_acr *acr,
struct hs_acr *acr_desc, bool is_recovery)
static int gv100_acr_patch_wpr_info_to_ucode(struct gk20a *g,
struct nvgpu_acr *acr, struct hs_acr *acr_desc,
bool is_recovery)
{
struct nvgpu_firmware *acr_fw = acr_desc->acr_fw;
struct acr_fw_header *acr_fw_hdr = NULL;
@@ -172,7 +175,8 @@ static u32 gv100_acr_lsf_conifg(struct gk20a *g,
return lsf_enable_mask;
}
static void nvgpu_gv100_acr_default_sw_init(struct gk20a *g, struct hs_acr *hs_acr)
static void nvgpu_gv100_acr_default_sw_init(struct gk20a *g,
struct hs_acr *hs_acr)
{
struct hs_flcn_bl *hs_bl = &hs_acr->acr_hs_bl;

12
drivers/gpu/nvgpu/common/acr/acr_gv100.h → drivers/gpu/nvgpu/common/acr/acr_sw_gv100.h
View File

@@ -20,12 +20,18 @@
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_ACR_GV100_H
#define NVGPU_ACR_GV100_H
#ifndef ACR_SW_GV100_H
#define ACR_SW_GV100_H
#include <nvgpu/types.h>
struct gk20a;
struct nvgpu_acr;
struct hs_acr;
int gv100_acr_fill_bl_dmem_desc(struct gk20a *g, struct nvgpu_acr *acr,
struct hs_acr *acr_desc, u32 *acr_ucode_header);
void nvgpu_gv100_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr);
#endif /* NVGPU_ACR_GV100_H */
#endif /* ACR_SW_GV100_H */

8
drivers/gpu/nvgpu/common/acr/acr_gv11b.c → drivers/gpu/nvgpu/common/acr/acr_sw_gv11b.c
View File

@@ -20,6 +20,8 @@
* DEALINGS IN THE SOFTWARE.
*/
#include "acr_sw_gv11b.h"
#include <nvgpu/types.h>
#include <nvgpu/firmware.h>
#include <nvgpu/gk20a.h>
@@ -32,9 +34,9 @@
#include "acr_blob_alloc.h"
#include "acr_blob_construct_v1.h"
#include "acr_bootstrap.h"
#include "acr_gm20b.h"
#include "acr_gv100.h"
#include "acr_gv11b.h"
#include "acr_sw_gm20b.h"
#include "acr_sw_gv100.h"
#include "acr_sw_gv11b.h"
static int gv11b_acr_patch_wpr_info_to_ucode(struct gk20a *g,
struct nvgpu_acr *acr, struct hs_acr *acr_desc, bool is_recovery)

9
drivers/gpu/nvgpu/common/acr/acr_gv11b.h → drivers/gpu/nvgpu/common/acr/acr_sw_gv11b.h
View File

@@ -20,10 +20,13 @@
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_ACR_GV11B_H
#define NVGPU_ACR_GV11B_H
#ifndef ACR_SW_GV11B_H
#define ACR_SW_GV11B_H
struct gk20a;
struct nvgpu_acr;
void nvgpu_gv11b_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr);
#endif /* NVGPU_ACR_GV11B_H */
#endif /* ACR_SW_GV11B_H */

12
drivers/gpu/nvgpu/common/acr/acr_tu104.c → drivers/gpu/nvgpu/common/acr/acr_sw_tu104.c
View File

@@ -20,6 +20,8 @@
* DEALINGS IN THE SOFTWARE.
*/
#include "acr_sw_tu104.h"
#include <nvgpu/gk20a.h>
#include <nvgpu/firmware.h>
#include <nvgpu/sec2if/sec2_if_cmn.h>
@@ -29,8 +31,8 @@
#include "acr_blob_alloc.h"
#include "acr_bootstrap.h"
#include "acr_blob_construct_v1.h"
#include "acr_gv100.h"
#include "acr_tu104.h"
#include "acr_sw_gv100.h"
#include "acr_sw_tu104.h"
#include "tu104/sec2_tu104.h"
@@ -88,7 +90,8 @@ static void nvgpu_tu104_acr_ahesasc_sw_init(struct gk20a *g,
}
acr_ahesasc->ptr_bl_dmem_desc = &acr_ahesasc->bl_dmem_desc_v1;
acr_ahesasc->bl_dmem_desc_size = (u32)sizeof(struct flcn_bl_dmem_desc_v1);
acr_ahesasc->bl_dmem_desc_size =
(u32)sizeof(struct flcn_bl_dmem_desc_v1);
acr_ahesasc->acr_flcn = &g->sec2.flcn;
acr_ahesasc->acr_flcn_setup_boot_config =
@@ -115,7 +118,8 @@ static void nvgpu_tu104_acr_asb_sw_init(struct gk20a *g,
acr_asb->bl_dmem_desc_size = (u32)sizeof(struct flcn_bl_dmem_desc_v1);
acr_asb->acr_flcn = &g->gsp_flcn;
acr_asb->acr_flcn_setup_boot_config = g->ops.gsp.falcon_setup_boot_config;
acr_asb->acr_flcn_setup_boot_config =
g->ops.gsp.falcon_setup_boot_config;
}
void nvgpu_tu104_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr)

9
drivers/gpu/nvgpu/common/acr/acr_tu104.h → drivers/gpu/nvgpu/common/acr/acr_sw_tu104.h
View File

@@ -20,9 +20,12 @@
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_ACR_TU104_H
#define NVGPU_ACR_TU104_H
#ifndef ACR_SW_TU104_H
#define ACR_SW_TU104_H
struct gk20a;
struct nvgpu_acr;
void nvgpu_tu104_acr_sw_init(struct gk20a *g, struct nvgpu_acr *acr);
#endif /*NVGPU_ACR_TU104_H*/
#endif /*ACR_SW_TU104_H*/