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gpu: nvgpu: Fix MISRA violations in Posix
Fix violations of MISRA Rule 21.2 in Posix unit. JIRA NVGPU-6533 Change-Id: I21bb6c4c18f7a904d639bf210bcd3d29f37d69bd Signed-off-by: ajesh <akv@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2486766 GVS: Gerrit_Virtual_Submit (cherry picked from commit 5239352b4acbe29a7cdb39821e68a717b132d2c9) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2491861 Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2017-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -33,12 +33,12 @@
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* Note: this code uses the GCC builtins to implement atomics.
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*/
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typedef struct __nvgpu_posix_atomic {
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typedef struct nvgpu_posix_atomic {
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/** 32 bit atomic variable. */
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atomic_int v;
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} nvgpu_atomic_t;
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typedef struct __nvgpu_posix_atomic64 {
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typedef struct nvgpu_posix_atomic64 {
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/** 64 bit atomic variable. */
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atomic_long v;
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} nvgpu_atomic64_t;
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@@ -36,7 +36,7 @@
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*
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* This could be revisited later, though.
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*/
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struct __nvgpu_posix_lock {
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struct nvgpu_posix_lock {
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/** Pthread mutex structure used internally to implement lock */
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pthread_mutex_t mutex;
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};
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@@ -49,7 +49,7 @@ struct __nvgpu_posix_lock {
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* Internal implementation of lock acquire used by public APIs of mutex,
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* spinlock and raw spinlock. Uses pthread_mutex_lock to acquire the lock.
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*/
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static inline void nvgpu_posix_lock_acquire(struct __nvgpu_posix_lock *lock)
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static inline void nvgpu_posix_lock_acquire(struct nvgpu_posix_lock *lock)
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{
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int err = pthread_mutex_lock(&lock->mutex);
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nvgpu_assert(err == 0);
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@@ -78,7 +78,7 @@ static inline void nvgpu_posix_lock_acquire(struct __nvgpu_posix_lock *lock)
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* the previous owning thread terminated while holding the mutex lock.
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*/
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static inline int nvgpu_posix_lock_try_acquire(
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struct __nvgpu_posix_lock *lock)
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struct nvgpu_posix_lock *lock)
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{
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return pthread_mutex_trylock(&lock->mutex);
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}
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@@ -91,7 +91,7 @@ static inline int nvgpu_posix_lock_try_acquire(
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* Internal implementation of lock release used by public APIs of mutex,
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* spinlock and raw spinlock. Uses pthread_mutex_unlock to release the lock.
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*/
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static inline void nvgpu_posix_lock_release(struct __nvgpu_posix_lock *lock)
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static inline void nvgpu_posix_lock_release(struct nvgpu_posix_lock *lock)
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{
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int err = pthread_mutex_unlock(&lock->mutex);
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@@ -105,7 +105,7 @@ struct nvgpu_mutex {
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* nvgpu lock structure used to implement mutex APIs. This private
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* structure is a wrapper over pthread_mutex_t.
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*/
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struct __nvgpu_posix_lock lock;
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struct nvgpu_posix_lock lock;
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};
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struct nvgpu_spinlock {
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@@ -114,7 +114,7 @@ struct nvgpu_spinlock {
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* structure is a wrapper over pthread_mutex_t. Posix unit
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* implementation of spinlock uses a pthread_mutex_t underneath.
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*/
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struct __nvgpu_posix_lock lock;
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struct nvgpu_posix_lock lock;
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};
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struct nvgpu_raw_spinlock {
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@@ -123,7 +123,7 @@ struct nvgpu_raw_spinlock {
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* private structure is a wrapper over pthread_mutex_t. Posix unit
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* implementation of raw spinlock uses a pthread_mutex_t underneath.
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*/
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struct __nvgpu_posix_lock lock;
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struct nvgpu_posix_lock lock;
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};
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static inline void nvgpu_spinlock_irqsave(struct nvgpu_spinlock *mutex,
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