nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: advertise NVS capability in gpu chars

Browse Source 
Add nvs_ioctl_nr_last in nvgpu_gpu_characteristics. Add a feature flag
SUPPORTS_NVS and enable it in Linux builds.

Jira NVGPU-6788

Change-Id: I19df78982cca989da7ee053511af59bbb5df1180
Signed-off-by: Konsta Hölttä <kholtta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2636409
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Konsta Hölttä
2021-12-01 18:51:05 +02:00
committed by mobile promotions
parent 0e8184b976
commit d474bd4206
4 changed files with 10 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/nvgpu/include/nvgpu/enabled.h
View File

@@ -216,6 +216,7 @@ struct gk20a;
DEFINE_FLAG(NVGPU_SUPPORT_VAB_ENABLED, "VAB feature supported"), \ DEFINE_FLAG(NVGPU_SUPPORT_VAB_ENABLED, "VAB feature supported"), \
DEFINE_FLAG(NVGPU_SUPPORT_ROP_IN_GPC, "ROP is part of GPC"), \ DEFINE_FLAG(NVGPU_SUPPORT_ROP_IN_GPC, "ROP is part of GPC"), \
DEFINE_FLAG(NVGPU_SUPPORT_BUFFER_METADATA, "Buffer metadata support"), \ DEFINE_FLAG(NVGPU_SUPPORT_BUFFER_METADATA, "Buffer metadata support"), \
DEFINE_FLAG(NVGPU_SUPPORT_NVS, "Domain scheduler support"), \
DEFINE_FLAG(NVGPU_MAX_ENABLED_BITS, "Marks max number of flags"), DEFINE_FLAG(NVGPU_MAX_ENABLED_BITS, "Marks max number of flags"),
/** /**

2
drivers/gpu/nvgpu/os/linux/driver_common.c
View File

@@ -129,6 +129,8 @@ static void nvgpu_init_vars(struct gk20a *g)
nvgpu_init_list_node(&g->boardobjgrp_head); nvgpu_init_list_node(&g->boardobjgrp_head);
nvgpu_set_enabled(g, NVGPU_HAS_SYNCPOINTS, platform->has_syncpoints); nvgpu_set_enabled(g, NVGPU_HAS_SYNCPOINTS, platform->has_syncpoints);
nvgpu_set_enabled(g, NVGPU_SUPPORT_NVS, true);
} }
static void nvgpu_init_max_comptag(struct gk20a *g) static void nvgpu_init_max_comptag(struct gk20a *g)

3
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
View File

@@ -305,6 +305,8 @@ static struct nvgpu_flags_mapping flags_mapping[] = {
NVGPU_SUPPORT_VAB_ENABLED}, NVGPU_SUPPORT_VAB_ENABLED},
{NVGPU_GPU_FLAGS_SUPPORT_BUFFER_METADATA, {NVGPU_GPU_FLAGS_SUPPORT_BUFFER_METADATA,
NVGPU_SUPPORT_BUFFER_METADATA}, NVGPU_SUPPORT_BUFFER_METADATA},
{NVGPU_GPU_FLAGS_SUPPORT_NVS,
NVGPU_SUPPORT_NVS},
}; };
static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g) static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g)
@@ -468,6 +470,7 @@ static long gk20a_ctrl_ioctl_gpu_characteristics(
gpu.event_ioctl_nr_last = NVGPU_EVENT_IOCTL_LAST; gpu.event_ioctl_nr_last = NVGPU_EVENT_IOCTL_LAST;
gpu.ctxsw_ioctl_nr_last = NVGPU_CTXSW_IOCTL_LAST; gpu.ctxsw_ioctl_nr_last = NVGPU_CTXSW_IOCTL_LAST;
gpu.prof_ioctl_nr_last = NVGPU_PROFILER_IOCTL_LAST; gpu.prof_ioctl_nr_last = NVGPU_PROFILER_IOCTL_LAST;
gpu.nvs_ioctl_nr_last = NVGPU_NVS_IOCTL_LAST;
gpu.gpu_va_bit_count = 40; gpu.gpu_va_bit_count = 40;
gpu.max_dbg_tsg_timeslice = g->tsg_dbg_timeslice_max_us; gpu.max_dbg_tsg_timeslice = g->tsg_dbg_timeslice_max_us;

5
include/uapi/linux/nvgpu-ctrl.h
View File

@@ -199,6 +199,8 @@ struct nvgpu_gpu_zbc_query_table_args {
#define NVGPU_GPU_FLAGS_L2_MAX_WAYS_EVICT_LAST_ENABLED (1ULL << 51) #define NVGPU_GPU_FLAGS_L2_MAX_WAYS_EVICT_LAST_ENABLED (1ULL << 51)
/* Vidmem access bits feature is supported */ /* Vidmem access bits feature is supported */
#define NVGPU_GPU_FLAGS_SUPPORT_VAB (1ULL << 52) #define NVGPU_GPU_FLAGS_SUPPORT_VAB (1ULL << 52)
/* The NVS scheduler interface is usable */
#define NVGPU_GPU_FLAGS_SUPPORT_NVS (1ULL << 53)
/* SM LRF ECC is enabled */ /* SM LRF ECC is enabled */
#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60) #define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
/* SM SHM ECC is enabled */ /* SM SHM ECC is enabled */
@@ -315,7 +317,8 @@ struct nvgpu_gpu_characteristics {
__s16 ctxsw_ioctl_nr_last; __s16 ctxsw_ioctl_nr_last;
__s16 prof_ioctl_nr_last; __s16 prof_ioctl_nr_last;
__u8 reserved2[4]; __s16 nvs_ioctl_nr_last;
__u8 reserved2[2];
__u32 max_ctxsw_ring_buffer_size; __u32 max_ctxsw_ring_buffer_size;
__u32 reserved3; __u32 reserved3;