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gpu: nvgpu: Add load_timestamp_prod in grmgr init

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1) Moved load_timestamp_prod handling in nvgpu_init_gr_manager().
2) Moved fifo.reset_enable_hw in nvgpu_early_init() -
   In simulation/emulation/GPU standalone platform,
   XBAR, L2 and HUB are enabled during g->ops.fifo.reset_enable_hw().
   This introduces a dependency to get the MIG map conf information.
   (if nvgpu_is_bpmp_running() == false treated as
   simulation/emulation/GPU standalone platform).

Bug 3307879
JIRA NVGPU-6633

Change-Id: I4cba3a527de4723a6500f9658ec1dcadc23b37e3
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2528174
Tested-by: Antony Clince Alex <aalex@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com>
Reviewed-by: Antony Clince Alex <aalex@nvidia.com>
Reviewed-by: Dinesh T <dt@nvidia.com>
Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Lakshmanan M
2021-05-12 10:00:54 +05:30
committed by mobile promotions
parent 5de20ab81b
commit d956938d3f
3 changed files with 19 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/gpu/nvgpu/common/grmgr/grmgr.c
View File

@@ -38,6 +38,12 @@ int nvgpu_init_gr_manager(struct gk20a *g)
u32 local_gpc_mask;
u32 ffs_bit = 0U;
#ifdef CONFIG_NVGPU_NEXT
if (g->ops.grmgr.load_timestamp_prod != NULL) {
g->ops.grmgr.load_timestamp_prod(g);
}
#endif
/* Number of gpu instance is 1 for legacy mode */
g->mig.gpc_count = g->ops.priv_ring.get_gpc_count(g);
nvgpu_assert(g->mig.gpc_count > 0U);

8
drivers/gpu/nvgpu/common/init/nvgpu_init.c
View File

@@ -626,6 +626,7 @@ static int nvgpu_early_init(struct gk20a *g)
NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_fbpa_ecc, NO_FLAG),
NVGPU_INIT_TABLE_ENTRY(g->ops.fb.init_fbpa, NO_FLAG),
#endif
NVGPU_INIT_TABLE_ENTRY(g->ops.fifo.reset_enable_hw, NO_FLAG),
NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_fb_support, NO_FLAG),
NVGPU_INIT_TABLE_ENTRY(g->ops.ltc.init_ltc_support, NO_FLAG),
NVGPU_INIT_TABLE_ENTRY(g->ops.grmgr.init_gr_manager, NO_FLAG),
@@ -691,6 +692,12 @@ int nvgpu_early_poweron(struct gk20a *g)
* grmgr init depends on the following HAL sub units,
* device - To get the device caps.
* priv_ring - To get the gpc count and other MIG config programming.
* fifo_reset_hw - In simulation/emulation/GPU standalone platform,
* XBAR, L2 and HUB are enabled during
* g->ops.fifo.reset_enable_hw(). This introduces a
* dependency to get the MIG map conf information.
* (if nvgpu_is_bpmp_running() == false treated as
* simulation/emulation/GPU standalone platform).
* fb - MIG config programming.
* ltc - MIG config programming.
* bios, bus, ecc and clk - dependent module of priv_ring/fb/ltc.
@@ -741,7 +748,6 @@ int nvgpu_finalize_poweron(struct gk20a *g)
NVGPU_INIT_TABLE_ENTRY(&nvgpu_init_fb_mem_unlock, NO_FLAG),
#endif
NVGPU_INIT_TABLE_ENTRY(g->ops.fifo.reset_enable_hw, NO_FLAG),
NVGPU_INIT_TABLE_ENTRY(g->ops.mm.init_mm_support, NO_FLAG),
NVGPU_INIT_TABLE_ENTRY(g->ops.fifo.fifo_init_support, NO_FLAG),
NVGPU_INIT_TABLE_ENTRY(g->ops.therm.elcg_init_idle_filters,

6
drivers/gpu/nvgpu/include/nvgpu/nvgpu_init.h
View File

@@ -103,6 +103,12 @@ struct nvgpu_ref;
* grmgr init depends on the following HAL sub units,
* device - To get the device caps.
* priv_ring - To get the gpc count and other MIG config programming.
* fifo_reset_hw - In simulation/emulation/GPU standalone platform,
* XBAR, L2 and HUB are enabled during
* g->ops.fifo.reset_enable_hw(). This introduces a
* dependency to get the MIG map conf information.
* (if nvgpu_is_bpmp_running() == false treated as
* simulation/emulation/GPU standalone platform).
* fb - MIG config programming.
* ltc - MIG config programming.
* bios, bus, ecc and clk - dependent module of priv_ring/fb/ltc.