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gpu: nvgpu: gv11b: clear channel status

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After unbinding channel, following fields in
channel status needs to be cleared manually:
ccsr_channel_enable_clr_true
ccsr_channel_pbdma_faulted_reset
ccsr_channel_eng_faulted_reset

Unbinding channel expected to clear all other
channel status fields.

Bug 1972365

Change-Id: Ibfd84df2f41adc2eb437a026acde3f3d618d7758
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1594671
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
seshendra Gadagottu
2017-11-08 15:59:31 -08:00
committed by mobile promotions
parent 96cb31ea10
commit d99b72974d
1 changed files with 12 additions and 1 deletions
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13
drivers/gpu/nvgpu/gv11b/fifo_gv11b.c
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@@ -260,9 +260,20 @@ void gv11b_userd_gp_put(struct gk20a *g, struct channel_gk20a *c)
void channel_gv11b_unbind(struct channel_gk20a *ch)
{
struct gk20a *g = ch->g;
gk20a_dbg_fn("");
gk20a_fifo_channel_unbind(ch);
if (nvgpu_atomic_cmpxchg(&ch->bound, true, false)) {
gk20a_writel(g, ccsr_channel_inst_r(ch->chid),
ccsr_channel_inst_ptr_f(0) |
ccsr_channel_inst_bind_false_f());
gk20a_writel(g, ccsr_channel_r(ch->chid),
ccsr_channel_enable_clr_true_f() |
ccsr_channel_pbdma_faulted_reset_f() |
ccsr_channel_eng_faulted_reset_f());
}
}
u32 gv11b_fifo_get_num_fifos(struct gk20a *g)