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gpu: nvgpu: remove nvgpu_tsg_update_sm_error_state_locked

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Remove nvgpu_tsg_update_sm_error_state_locked which is not
used anymore.

Jira NVGPU-3476

Change-Id: I4188f6ff71c02045f1628d4be1599c891c2219b5
Signed-off-by: Thomas Fleury <tfleury@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2124411
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Thomas Fleury
2019-05-23 11:09:45 -07:00
committed by mobile promotions
parent 4cf2d2166c
commit dbbb7d2965
2 changed files with 0 additions and 23 deletions
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20
drivers/gpu/nvgpu/common/fifo/tsg.c
View File

@@ -802,26 +802,6 @@ int nvgpu_tsg_alloc_sm_error_states_mem(struct gk20a *g,
return err;
}
void nvgpu_tsg_update_sm_error_state_locked(struct nvgpu_tsg *tsg,
u32 sm_id,
struct nvgpu_tsg_sm_error_state *sm_error_state)
{
struct nvgpu_tsg_sm_error_state *tsg_sm_error_states;
tsg_sm_error_states = tsg->sm_error_states + sm_id;
tsg_sm_error_states->hww_global_esr =
sm_error_state->hww_global_esr;
tsg_sm_error_states->hww_warp_esr =
sm_error_state->hww_warp_esr;
tsg_sm_error_states->hww_warp_esr_pc =
sm_error_state->hww_warp_esr_pc;
tsg_sm_error_states->hww_global_esr_report_mask =
sm_error_state->hww_global_esr_report_mask;
tsg_sm_error_states->hww_warp_esr_report_mask =
sm_error_state->hww_warp_esr_report_mask;
}
int nvgpu_tsg_set_sm_exception_type_mask(struct nvgpu_channel *ch,
u32 exception_mask)
{

3
drivers/gpu/nvgpu/include/nvgpu/tsg.h
View File

@@ -137,9 +137,6 @@ int nvgpu_tsg_set_priority(struct gk20a *g, struct nvgpu_tsg *tsg,
int nvgpu_tsg_alloc_sm_error_states_mem(struct gk20a *g,
struct nvgpu_tsg *tsg,
u32 num_sm);
void nvgpu_tsg_update_sm_error_state_locked(struct nvgpu_tsg *tsg,
u32 sm_id,
struct nvgpu_tsg_sm_error_state *sm_error_state);
int nvgpu_tsg_set_sm_exception_type_mask(struct nvgpu_channel *ch,
u32 exception_mask);