gpu: nvgpu: move therm code from pmu_gk20a.c to therm unit

As part of PMU HAL separation, need to move non-HAL code to respective
UNIT & found still some therm code left in pmu_gk20a.c files which
needs to be moved therm UNIT.

JIRA NVGPU-2002

Change-Id: I44fe5e9b0966bb508307a6323e09e1edd59aff02
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2089871
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2019-04-08 10:00:28 +05:30
committed by mobile promotions
parent f7a169e7f3
commit df7d80beb1
4 changed files with 32 additions and 28 deletions

View File

@@ -359,31 +359,6 @@ bool gk20a_is_pmu_supported(struct gk20a *g)
return true;
}
int nvgpu_pmu_handle_therm_event(struct nvgpu_pmu *pmu,
struct nv_pmu_therm_msg *msg)
{
struct gk20a *g = gk20a_from_pmu(pmu);
nvgpu_log_fn(g, " ");
switch (msg->msg_type) {
case NV_PMU_THERM_MSG_ID_EVENT_HW_SLOWDOWN_NOTIFICATION:
if (msg->hw_slct_msg.mask == BIT(NV_PMU_THERM_EVENT_THERMAL_1)) {
nvgpu_clk_arb_send_thermal_alarm(pmu->g);
} else {
nvgpu_pmu_dbg(g, "Unwanted/Unregistered thermal event received %d",
msg->hw_slct_msg.mask);
}
break;
default:
nvgpu_pmu_dbg(g, "unknown therm event received %d",
msg->msg_type);
break;
}
return 0;
}
bool gk20a_pmu_is_interrupted(struct nvgpu_pmu *pmu)
{
struct gk20a *g = gk20a_from_pmu(pmu);

View File

@@ -22,10 +22,38 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/pmu/therm.h>
#include <nvgpu/clk_arb.h>
#include "thrm.h"
#include "thrmpmu.h"
int nvgpu_pmu_handle_therm_event(struct nvgpu_pmu *pmu,
struct nv_pmu_therm_msg *msg)
{
struct gk20a *g = gk20a_from_pmu(pmu);
nvgpu_log_fn(g, " ");
switch (msg->msg_type) {
case NV_PMU_THERM_MSG_ID_EVENT_HW_SLOWDOWN_NOTIFICATION:
if (msg->hw_slct_msg.mask ==
BIT(NV_PMU_THERM_EVENT_THERMAL_1)) {
nvgpu_clk_arb_send_thermal_alarm(pmu->g);
} else {
nvgpu_pmu_dbg(g,
"Unwanted/Unregistered thermal event received %d",
msg->hw_slct_msg.mask);
}
break;
default:
nvgpu_pmu_dbg(g, "unkown therm event received %d",
msg->msg_type);
break;
}
return 0;
}
int nvgpu_therm_domain_sw_setup(struct gk20a *g)
{
int status;

View File

@@ -278,9 +278,6 @@ int nvgpu_pmu_lock_acquire(struct gk20a *g, struct nvgpu_pmu *pmu,
int nvgpu_pmu_lock_release(struct gk20a *g, struct nvgpu_pmu *pmu,
u32 id, u32 *token);
int nvgpu_pmu_handle_therm_event(struct nvgpu_pmu *pmu,
struct nv_pmu_therm_msg *msg);
/* PMU init */
int nvgpu_init_pmu_support(struct gk20a *g);
int nvgpu_pmu_destroy(struct gk20a *g);

View File

@@ -25,7 +25,11 @@
#define NVGPU_PMU_THERM_H
struct gk20a;
struct nvgpu_pmu;
struct nv_pmu_therm_msg;
int nvgpu_pmu_handle_therm_event(struct nvgpu_pmu *pmu,
struct nv_pmu_therm_msg *msg);
int nvgpu_therm_domain_sw_setup(struct gk20a *g);
int nvgpu_therm_domain_pmu_setup(struct gk20a *g);
int nvgpu_therm_pmu_init_pmupstate(struct gk20a *g);