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gpu: nvgpu: Split pmgr.h into private and public

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pmgr/pmgr.h is used both by pmgr itself, and other units calling pmgr.
Move all public dependencies to include/nvgpu/pmu/pmgr.h

JIRA NVGPU-961

Change-Id: I753fd64d4bfd4667239cf0dcb2aea00a7e010e75
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1986071
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Terje Bergstrom
2018-12-13 16:01:05 -08:00
committed by mobile promotions
parent ddbd954210
commit e04db419d7
5 changed files with 48 additions and 15 deletions
Download Patch File Download Diff File Expand all files Collapse all files

40
drivers/gpu/nvgpu/include/nvgpu/pmu/pmgr.h Normal file
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@@ -0,0 +1,40 @@
/*
* general power device structures & definitions
*
* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_PMU_PMGR_H
#define NVGPU_PMU_PMGR_H
#include <nvgpu/types.h>
struct gk20a;
int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val);
int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val);
int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val);
int pmgr_domain_sw_setup(struct gk20a *g);
int pmgr_domain_pmu_setup(struct gk20a *g);
int pmgr_pmu_init_pmupstate(struct gk20a *g);
void pmgr_pmu_free_pmupstate(struct gk20a *g);
#endif /* NVGPU_PMU_PMGR_H */

4
drivers/gpu/nvgpu/os/linux/debug_pmgr.c
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@@ -16,9 +16,9 @@
#include <linux/debugfs.h>
#include "os_linux.h"
#include <nvgpu/pmu/pmgr.h>
#include "pmgr/pmgr.h"
#include "os_linux.h"
static int pmgr_pwr_devices_get_power_u64(void *data, u64 *p)
{

2
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
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@@ -33,6 +33,7 @@
#include <nvgpu/clk_arb.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/channel.h>
#include <nvgpu/pmu/pmgr.h>
#include "ioctl_ctrl.h"
#include "ioctl_dbg.h"
@@ -46,7 +47,6 @@
#include "dmabuf.h"
#include "channel.h"
#include "dmabuf_vidmem.h"
#include "pmgr/pmgr.h"
#define HZ_TO_MHZ(a) ((a > 0xF414F9CD7ULL) ? 0xffff : (a >> 32) ? \
(u32) ((a * 0x10C8ULL) >> 32) : (u16) ((u32) a/MHZ))

16
drivers/gpu/nvgpu/pmgr/pmgr.h
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@@ -1,7 +1,7 @@
/*
* general power device structures & definitions
*
* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -21,8 +21,8 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef NVGPU_PMGR_H
#define NVGPU_PMGR_H
#ifndef NVGPU_PMGR_PMGR_H
#define NVGPU_PMGR_PMGR_H
#include "pwrdev.h"
#include "pwrmonitor.h"
@@ -34,12 +34,4 @@ struct pmgr_pmupstate {
struct pmgr_pwr_policy pmgr_policyobjs;
};
int pmgr_domain_sw_setup(struct gk20a *g);
int pmgr_domain_pmu_setup(struct gk20a *g);
int pmgr_pwr_devices_get_current(struct gk20a *g, u32 *val);
int pmgr_pwr_devices_get_voltage(struct gk20a *g, u32 *val);
int pmgr_pwr_devices_get_power(struct gk20a *g, u32 *val);
int pmgr_pmu_init_pmupstate(struct gk20a *g);
void pmgr_pmu_free_pmupstate(struct gk20a *g);
#endif /* NVGPU_PMGR_H */
#endif /* NVGPU_PMGR_PMGR_H */

1
drivers/gpu/nvgpu/pstate/pstate.c
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@@ -26,6 +26,7 @@
#include <nvgpu/gk20a.h>
#include <nvgpu/pmu.h>
#include <nvgpu/pmu/clk.h>
#include <nvgpu/pmu/pmgr.h>
#include "pmu_perf/pmu_perf.h"
#include "pmu_perf/change_seq.h"