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gpu: nvgpu: Fix build failure by missing headers

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Move the platform_gk20a.h include out of the ifdef CONFIG_DEBUG_FS
in the CDE code since dev_from_gk20a() is used regardless of
whether debugfs is enabled.

Also modify some of the CE ops to take a struct gk20a instead of a
struct device. This avoids any requirement for including
linux/device.h or platform_gk20a.h.

Bug 200310575

Change-Id: Ifef963cd0f66d05094a698200386cc6140920eac
Signed-off-by: skadamati <skadamati@nvidia.com>
Reviewed-on: http://git-master/r/1487830
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
skadamati
2017-05-23 15:55:29 +05:30
committed by mobile promotions
parent 2e338c77ea
commit e21e6e947b
5 changed files with 12 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/nvgpu/gk20a/cde_gk20a.c
View File

@@ -20,7 +20,6 @@
#include <linux/fs.h>
#ifdef CONFIG_DEBUG_FS
#include <linux/debugfs.h>
#include "platform_gk20a.h"
#endif
#include <linux/dma-buf.h>
@@ -42,6 +41,7 @@
#include "fence_gk20a.h"
#include "gr_gk20a.h"
#include "debug_gk20a.h"
#include "platform_gk20a.h"
#include <nvgpu/hw/gk20a/hw_ccsr_gk20a.h>
#include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h>

9
drivers/gpu/nvgpu/gk20a/ce2_gk20a.c
View File

@@ -424,7 +424,7 @@ void gk20a_ce_suspend(struct gk20a *g)
}
/* CE app utility functions */
u32 gk20a_ce_create_context_with_cb(struct device *dev,
u32 gk20a_ce_create_context_with_cb(struct gk20a *g,
int runlist_id,
int priority,
int timeslice,
@@ -432,7 +432,6 @@ u32 gk20a_ce_create_context_with_cb(struct device *dev,
ce_event_callback user_event_callback)
{
struct gk20a_gpu_ctx *ce_ctx;
struct gk20a *g = gk20a_from_dev(dev);
struct gk20a_ce_app *ce_app = &g->ce_app;
u32 ctx_id = ~0;
int err = 0;
@@ -548,7 +547,7 @@ end:
}
EXPORT_SYMBOL(gk20a_ce_create_context_with_cb);
int gk20a_ce_execute_ops(struct device *dev,
int gk20a_ce_execute_ops(struct gk20a *g,
u32 ce_ctx_id,
u64 src_buf,
u64 dst_buf,
@@ -561,7 +560,6 @@ int gk20a_ce_execute_ops(struct device *dev,
struct gk20a_fence **gk20a_fence_out)
{
int ret = -EPERM;
struct gk20a *g = gk20a_from_dev(dev);
struct gk20a_ce_app *ce_app = &g->ce_app;
struct gk20a_gpu_ctx *ce_ctx, *ce_ctx_save;
bool found = false;
@@ -700,10 +698,9 @@ end:
}
EXPORT_SYMBOL(gk20a_ce_execute_ops);
void gk20a_ce_delete_context(struct device *dev,
void gk20a_ce_delete_context(struct gk20a *g,
u32 ce_ctx_id)
{
struct gk20a *g = gk20a_from_dev(dev);
gk20a_ce_delete_context_priv(g, ce_ctx_id);
}

6
drivers/gpu/nvgpu/gk20a/ce2_gk20a.h
View File

@@ -134,13 +134,13 @@ void gk20a_ce_suspend(struct gk20a *g);
void gk20a_ce_destroy(struct gk20a *g);
/* CE app utility functions */
u32 gk20a_ce_create_context_with_cb(struct device *dev,
u32 gk20a_ce_create_context_with_cb(struct gk20a *g,
int runlist_id,
int priority,
int timeslice,
int runlist_level,
ce_event_callback user_event_callback);
int gk20a_ce_execute_ops(struct device *dev,
int gk20a_ce_execute_ops(struct gk20a *g,
u32 ce_ctx_id,
u64 src_buf,
u64 dst_buf,
@@ -153,7 +153,7 @@ int gk20a_ce_execute_ops(struct device *dev,
struct gk20a_fence **gk20a_fence_out);
void gk20a_ce_delete_context_priv(struct gk20a *g,
u32 ce_ctx_id);
void gk20a_ce_delete_context(struct device *dev,
void gk20a_ce_delete_context(struct gk20a *g,
u32 ce_ctx_id);

8
drivers/gpu/nvgpu/gk20a/mm_gk20a.c
View File

@@ -502,7 +502,7 @@ static int gk20a_vidmem_clear_all(struct gk20a *g)
if (mm->vidmem.ce_ctx_id == (u32)~0)
return -EINVAL;
err = gk20a_ce_execute_ops(g->dev,
err = gk20a_ce_execute_ops(g,
mm->vidmem.ce_ctx_id,
0,
mm->vidmem.base,
@@ -521,7 +521,7 @@ static int gk20a_vidmem_clear_all(struct gk20a *g)
region2_base = mm->vidmem.bootstrap_base + mm->vidmem.bootstrap_size;
err = gk20a_ce_execute_ops(g->dev,
err = gk20a_ce_execute_ops(g,
mm->vidmem.ce_ctx_id,
0,
region2_base,
@@ -765,7 +765,7 @@ void gk20a_init_mm_ce_context(struct gk20a *g)
#if defined(CONFIG_GK20A_VIDMEM)
if (g->mm.vidmem.size && (g->mm.vidmem.ce_ctx_id == (u32)~0)) {
g->mm.vidmem.ce_ctx_id =
gk20a_ce_create_context_with_cb(g->dev,
gk20a_ce_create_context_with_cb(g,
gk20a_fifo_get_fast_ce_runlist_id(g),
-1,
-1,
@@ -1683,7 +1683,7 @@ static int gk20a_gmmu_clear_vidmem_mem(struct gk20a *g, struct nvgpu_mem *mem)
if (gk20a_last_fence)
gk20a_fence_put(gk20a_last_fence);
err = gk20a_ce_execute_ops(g->dev,
err = gk20a_ce_execute_ops(g,
g->mm.vidmem.ce_ctx_id,
0,
chunk->base,

3
drivers/gpu/nvgpu/gk20a/sched_gk20a.c
View File

@@ -478,8 +478,7 @@ long gk20a_sched_dev_ioctl(struct file *filp, unsigned int cmd,
(struct nvgpu_sched_tsg_refcount_args *)buf);
break;
default:
dev_dbg(dev_from_gk20a(g), "unrecognized gpu ioctl cmd: 0x%x",
cmd);
nvgpu_log_info(g, "unrecognized gpu ioctl cmd: 0x%x", cmd);
err = -ENOTTY;
}