gpu: nvgpu: whitelist MISRA 8.7 violations

Whitelist false positives caused by a Coverity scanner bug
where Advisory Rule 8.7 violations are raised when both
'static' and 'const' are used in the definition of an object.

This bug exists in Coverity v2019.06 and is reported to be
fixed in Coverity v2019.12.

See nvbug 2823817 for more information.

JIRA NVGPU-3178

Change-Id: I495e927766617f797f009cdd71a919b73ce371e8
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2286769
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Scott Long
2020-01-28 17:51:52 -08:00
committed by Alex Waterman
parent eabba98e2a
commit e262bdb946
4 changed files with 8 additions and 0 deletions

View File

@@ -381,7 +381,9 @@ static void nvgpu_bitmap_print_stats(struct nvgpu_allocator *na,
}
#endif
NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, NVGPU_MISRA(Rule, 8_7), "Bug 2823817")
static const struct nvgpu_allocator_ops bitmap_ops = {
NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 8_7))
.alloc = nvgpu_bitmap_balloc,
.free_alloc = nvgpu_bitmap_free,

View File

@@ -1326,7 +1326,9 @@ static void nvgpu_buddy_print_stats(struct nvgpu_allocator *na,
}
#endif
NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, NVGPU_MISRA(Rule, 8_7), "Bug 2823817")
static const struct nvgpu_allocator_ops buddy_ops = {
NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 8_7))
.alloc = nvgpu_buddy_balloc,
.alloc_pte = nvgpu_buddy_balloc_pte,
.free_alloc = nvgpu_buddy_bfree,

View File

@@ -364,7 +364,9 @@ static void nvgpu_mem_phys_sgt_free(struct gk20a *g, struct nvgpu_sgt *sgt)
*/
}
NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, NVGPU_MISRA(Rule, 8_7), "Bug 2823817")
static const struct nvgpu_sgt_ops nvgpu_mem_phys_ops = {
NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 8_7))
.sgl_next = nvgpu_mem_phys_sgl_next,
.sgl_dma = nvgpu_mem_phys_sgl_dma,
.sgl_phys = nvgpu_mem_phys_sgl_phys,

View File

@@ -225,7 +225,9 @@ static int gv11b_init_gpu_characteristics(struct gk20a *g)
return 0;
}
NVGPU_COV_WHITELIST_BLOCK_BEGIN(false_positive, 1, NVGPU_MISRA(Rule, 8_7), "Bug 2823817")
static const struct gpu_ops gv11b_ops = {
NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 8_7))
.acr = {
.acr_init = nvgpu_acr_init,
.acr_construct_execute = nvgpu_acr_construct_execute,