gpu: nvgpu: read WPR info from fb

- Added function to read WPR info from FB
MMU registers
- Added HAL to point wpr info read function
- Replaced wpr info read from MC with HAL
- Removed debugfs header include from acr files.

JIRA NVGPU-128

Change-Id: I5ebec46bfe03b9200f2aa569f2e5a780a715616d
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1564683
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

drivers/gpu/nvgpu/gk20a/gk20a.h

@@ -432,6 +432,8 @@ struct gpu_ops {
 		unsigned int (*compressible_page_size)(struct gk20a *g);
 		void (*dump_vpr_wpr_info)(struct gk20a *g);
 		int (*vpr_info_fetch)(struct gk20a *g);
+		void (*read_wpr_info)(struct gk20a *g,
+				struct wpr_carveout_info *inf);
 		bool (*is_debug_mode_enabled)(struct gk20a *g);
 		void (*set_debug_mode)(struct gk20a *g, bool enable);
 		void (*tlb_invalidate)(struct gk20a *g, struct nvgpu_mem *pdb);

drivers/gpu/nvgpu/gm20b/acr_gm20b.c

@@ -11,12 +11,7 @@
  * more details.
  */
 
-#ifdef CONFIG_DEBUG_FS
-#include <linux/debugfs.h>
-#endif
-
 #include <nvgpu/types.h>
-#include <linux/platform/tegra/mc.h>
 
 #include <nvgpu/dma.h>
 #include <nvgpu/gmmu.h>
@@ -83,13 +78,7 @@ static void start_gm20b_pmu(struct gk20a *g)
 
 void gm20b_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf)
 {
-	struct mc_carveout_info mem_inf;
-
-	mc_get_carveout_info(&mem_inf, NULL, MC_SECURITY_CARVEOUT2);
-
-	inf->wpr_base = mem_inf.base;
-	inf->nonwpr_base = 0;
-	inf->size = mem_inf.size;
+	g->ops.fb.read_wpr_info(g, inf);
 }
 
 bool gm20b_is_pmu_supported(struct gk20a *g)

drivers/gpu/nvgpu/gm20b/fb_gm20b.c

@@ -24,6 +24,7 @@
 #include <nvgpu/hw/gm20b/hw_gr_gm20b.h>
 
 #define VPR_INFO_FETCH_WAIT	(5)
+#define WPR_INFO_ADDR_ALIGNMENT 0x0000000c
 
 void fb_gm20b_init_fs_state(struct gk20a *g)
 {
@@ -523,6 +524,37 @@ int gm20b_fb_vpr_info_fetch(struct gk20a *g)
 	return gm20b_fb_vpr_info_fetch_wait(g, VPR_INFO_FETCH_WAIT);
 }
 
+void gm20b_fb_read_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf)
+{
+	u32 val = 0;
+	u64 wpr_start = 0;
+	u64 wpr_end = 0;
+
+	val = gk20a_readl(g, fb_mmu_wpr_info_r());
+	val &= ~0xF;
+	val |= fb_mmu_wpr_info_index_wpr1_addr_lo_v();
+	gk20a_writel(g, fb_mmu_wpr_info_r(), val);
+
+	val = gk20a_readl(g, fb_mmu_wpr_info_r()) >> 0x4;
+	wpr_start = hi32_lo32_to_u64(
+			(val >> (32 - WPR_INFO_ADDR_ALIGNMENT)),
+			(val << WPR_INFO_ADDR_ALIGNMENT));
+
+	val = gk20a_readl(g, fb_mmu_wpr_info_r());
+	val &= ~0xF;
+	val |= fb_mmu_wpr_info_index_wpr1_addr_hi_v();
+	gk20a_writel(g, fb_mmu_wpr_info_r(), val);
+
+	val = gk20a_readl(g, fb_mmu_wpr_info_r()) >> 0x4;
+	wpr_end = hi32_lo32_to_u64(
+			(val >> (32 - WPR_INFO_ADDR_ALIGNMENT)),
+			(val << WPR_INFO_ADDR_ALIGNMENT));
+
+	inf->wpr_base = wpr_start;
+	inf->nonwpr_base = 0;
+	inf->size = (wpr_end - wpr_start);
+}
+
 bool gm20b_fb_debug_mode_enabled(struct gk20a *g)
 {
 	u32 debug_ctrl = gk20a_readl(g, gr_gpcs_pri_mmu_debug_ctrl_r());

drivers/gpu/nvgpu/gm20b/fb_gm20b.h

@@ -23,6 +23,7 @@ bool gm20b_fb_set_use_full_comp_tag_line(struct gk20a *g);
 unsigned int gm20b_fb_compression_page_size(struct gk20a *g);
 unsigned int gm20b_fb_compressible_page_size(struct gk20a *g);
 void gm20b_fb_dump_vpr_wpr_info(struct gk20a *g);
+void gm20b_fb_read_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf);
 int gm20b_fb_vpr_info_fetch(struct gk20a *g);
 bool gm20b_fb_debug_mode_enabled(struct gk20a *g);
 void gm20b_fb_set_debug_mode(struct gk20a *g, bool enable);

drivers/gpu/nvgpu/gm20b/hal_gm20b.c

@@ -296,6 +296,7 @@ static const struct gpu_ops gm20b_ops = {
 		.compressible_page_size = gm20b_fb_compressible_page_size,
 		.vpr_info_fetch = gm20b_fb_vpr_info_fetch,
 		.dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info,
+		.read_wpr_info = gm20b_fb_read_wpr_info,
 		.is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
 		.set_debug_mode = gm20b_fb_set_debug_mode,
 		.tlb_invalidate = gk20a_fb_tlb_invalidate,

drivers/gpu/nvgpu/gp106/acr_gp106.c

@@ -11,10 +11,6 @@
  * more details.
  */
 
-#ifdef CONFIG_DEBUG_FS
-#include <linux/debugfs.h>
-#endif
-
 #include <nvgpu/nvgpu_common.h>
 #include <nvgpu/kmem.h>
 #include <nvgpu/dma.h>

drivers/gpu/nvgpu/gp106/hal_gp106.c

@@ -357,6 +357,7 @@ static const struct gpu_ops gp106_ops = {
 		.compressible_page_size = gp10b_fb_compressible_page_size,
 		.vpr_info_fetch = gm20b_fb_vpr_info_fetch,
 		.dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info,
+		.read_wpr_info = gm20b_fb_read_wpr_info,
 		.is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
 		.set_debug_mode = gm20b_fb_set_debug_mode,
 		.tlb_invalidate = gk20a_fb_tlb_invalidate,

drivers/gpu/nvgpu/gp10b/hal_gp10b.c

@@ -315,6 +315,7 @@ static const struct gpu_ops gp10b_ops = {
 		.compressible_page_size = gp10b_fb_compressible_page_size,
 		.vpr_info_fetch = gm20b_fb_vpr_info_fetch,
 		.dump_vpr_wpr_info = gm20b_fb_dump_vpr_wpr_info,
+		.read_wpr_info = gm20b_fb_read_wpr_info,
 		.is_debug_mode_enabled = gm20b_fb_debug_mode_enabled,
 		.set_debug_mode = gm20b_fb_set_debug_mode,
 		.tlb_invalidate = gk20a_fb_tlb_invalidate,