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gpu: nvgpu: gr/init MISRA fix for Rule 15.7

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Fix misra_violation - No non-empty terminating else statement.

Jira NVGPU-3227

Change-Id: I1948f6f020de2e9e1f429820621bc403f1bc4d59
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2111677
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vinod G
2019-05-03 16:10:38 -07:00
committed by mobile promotions
parent b3603b9e16
commit e545a7b52e
1 changed files with 4 additions and 2 deletions
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6
drivers/gpu/nvgpu/hal/gr/init/gr_init_tu104.c
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@@ -158,8 +158,10 @@ int tu104_gr_init_load_sw_bundle64(struct gk20a *g,
if (gr_pipe_bundle_address_value_v(sw_bundle64_init->l[i].addr)
== GR_GO_IDLE_BUNDLE) {
err = g->ops.gr.init.wait_idle(g);
} else if (nvgpu_platform_is_silicon(g)) {
err = g->ops.gr.init.wait_fe_idle(g);
} else {
if (nvgpu_platform_is_silicon(g)) {
err = g->ops.gr.init.wait_fe_idle(g);
}
}
if (err != 0) {
break;