gpu: nvgpu: post events on all channels of TSG.

Raise the SM exception event on dbg fds of all
channels as userspace might have registered on
only one of the channels.
WAR till we fix Bug 200089620

Bug 1724367

Change-Id: I69c20ee9837927c116f350f4bdc70af5e90cd0a8
Signed-off-by: Ashutosh Jain <ashutoshj@nvidia.com>
Reviewed-on: http://git-master/r/1012851
(cherry picked from commit 92f7086856bc9e23b39c5f3ceec3130b6407e0d1)
Reviewed-on: http://git-master/r/1013813
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Tested-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Ashutosh Jain
2016-02-17 18:30:48 +05:30
committed by Terje Bergstrom
parent d3bd5adfca
commit e55a459e2b

View File

@@ -5584,8 +5584,20 @@ int gk20a_gr_isr(struct gk20a *g)
&post_event, fault_ch);
/* signal clients waiting on an event */
if (gk20a_gr_sm_debugger_attached(g) && post_event && fault_ch)
gk20a_dbg_gpu_post_events(fault_ch);
if (gk20a_gr_sm_debugger_attached(g) && post_event && fault_ch) {
if (gk20a_is_channel_marked_as_tsg(fault_ch)) {
struct tsg_gk20a *tsg = &g->fifo.tsg[fault_ch->tsgid];
struct channel_gk20a *__ch;
mutex_lock(&tsg->ch_list_lock);
list_for_each_entry(__ch, &tsg->ch_list, ch_entry) {
gk20a_dbg_gpu_post_events(__ch);
}
mutex_unlock(&tsg->ch_list_lock);
} else {
gk20a_dbg_gpu_post_events(fault_ch);
}
}
if (need_reset && ch)
gk20a_set_error_notifier(ch,