gpu: nvgpu: MSCG support

- update gp106 pg engine init/list/features HALs
  to support MS engine
- Added defines & interface for lpwr tables read  from vbios.
- lpwr module which reads idx/gr/ms table from vbios to
  map rppg/mscg support with respective p-state
- lpwr module public functions to control lpwr
  features enable/disable mscg/rppg & mclk-change
  request whenever change in mclk-change parameters
- lpwr public functions to know rppg/mscg support for
  requested pstate,
- added mutex t prevent PG transition while arbiter
  executes pstate transition
- nvgpu_clk_arb_get_current_pstate() of clk arbiter to
  get current pstate

JIRA DNVGPU-71

Change-Id: Ifcd640cc19ef630be1e2a9ba07ec84023d8202a0
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1247553
(cherry picked from commit 8a441dea2410e1b5196ef24e56a7768b6980e46b)
Reviewed-on: http://git-master/r/1270989
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Mahantesh Kumbar
2016-11-03 21:16:21 +05:30
committed by Deepak Nibade
parent 62d13e6138
commit e5824d8014
11 changed files with 692 additions and 44 deletions

View File

@@ -18,6 +18,7 @@
#include "pstate/pstate.h"
#include "gk20a/gk20a.h"
#include "volt/volt.h"
#include "lpwr/lpwr.h"
#define CTRL_PERF_VFE_VAR_TYPE_INVALID 0x00
#define CTRL_PERF_VFE_VAR_TYPE_DERIVED 0x01
@@ -57,6 +58,7 @@ struct perf_pmupstate {
struct vfe_equs vfe_equobjs;
struct pstates pstatesobjs;
struct obj_volt volt;
struct obj_lwpr lpwr;
};
u32 perf_pmu_vfe_load(struct gk20a *g);