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gpu: nvgpu: Add SW_THRESHOLD policy support

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Added SW_THRESHOLD policy support for over power protection.

JIRA DNVGPU-70

Change-Id: I021f47f234d42be15ddbfd02a22e9299fd486636
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1233051
(cherry picked from commit 301e0ac123a7a65a7f83e5615f3a89e55253a0bd)
Reviewed-on: http://git-master/r/1241958
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Lakshmanan M
2016-10-07 14:24:58 +05:30
committed by mobile promotions
parent 315d8c6caa
commit e5a762c637
2 changed files with 11 additions and 0 deletions
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1
drivers/gpu/nvgpu/ctrl/ctrlpmgr.h
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@@ -28,6 +28,7 @@
#define CTRL_PMGR_PWR_POLICY_TABLE_VERSION_3X 0x30
#define CTRL_PMGR_PWR_POLICY_TYPE_HW_THRESHOLD 0x04
#define CTRL_PMGR_PWR_POLICY_TYPE_SW_THRESHOLD 0x0C
#define CTRL_PMGR_PWR_POLICY_MAX_LIMIT_INPUTS 0x8
#define CTRL_PMGR_PWR_POLICY_IDX_NUM_INDEXES 0x08

10
drivers/gpu/nvgpu/pmuif/gpmuifpmgr.h
View File

@@ -212,6 +212,15 @@ struct nv_pmu_pmgr_pwr_policy_hw_threshold {
u16 low_threshold_value;
};
struct nv_pmu_pmgr_pwr_policy_sw_threshold {
struct nv_pmu_pmgr_pwr_policy super;
u8 threshold_idx;
u8 low_threshold_idx;
bool b_use_low_threshold;
u16 low_threshold_value;
u8 event_id;
};
struct nv_pmu_pmgr_pwr_policy_pmu_compactible {
u8 pmu_compactible_data[68];
};
@@ -220,6 +229,7 @@ union nv_pmu_pmgr_pwr_policy_union {
struct nv_pmu_boardobj board_obj;
struct nv_pmu_pmgr_pwr_policy pwr_policy;
struct nv_pmu_pmgr_pwr_policy_hw_threshold hw_threshold;
struct nv_pmu_pmgr_pwr_policy_sw_threshold sw_threshold;
struct nv_pmu_pmgr_pwr_policy_pmu_compactible pmu_pwr_policy;
};