gpu: nvgpu: fix MISRA issues in cond unit

Rule 10.1 Requires that operands shall not be of an inappropriate
essential type.
Rule 14.3 Requires that controlling expressions shall not be
invariant.
Rule 20.7 Requires that expressions resulting from the expansion
of macro parameters shall be enclosed in parentheses.
Fix violations of above rules in the macro defined in cond unit.

Jira NVGPU-3878

Change-Id: Icd5758ae12210e68333c4ab820a36dc48c0aa29e
Signed-off-by: ajesh <akv@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2183647
GVS: Gerrit_Virtual_Submit
Reviewed-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
ajesh
2019-08-26 17:08:08 +05:30
committed by mobile promotions
parent 486815f81f
commit e60b7d773b

View File

@@ -55,8 +55,10 @@ void nvgpu_cond_unlock(struct nvgpu_cond *cond);
#define NVGPU_COND_WAIT_LOCKED(cond, condition, timeout_ms) \
({ \
int ret = 0; \
NVGPU_COND_WAIT_TIMEOUT_LOCKED(cond, condition, ret, \
timeout_ms ? timeout_ms : \
u32 cond_timeout_ms = (timeout_ms); \
NVGPU_COND_WAIT_TIMEOUT_LOCKED((cond), (condition), \
(ret), \
((cond_timeout_ms) != 0U) ? (cond_timeout_ms) : \
NVGPU_COND_WAIT_TIMEOUT_MAX_MS); \
ret; \
})