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gpu: nvgpu: fix MISRA issues in cond unit
Rule 10.1 Requires that operands shall not be of an inappropriate essential type. Rule 14.3 Requires that controlling expressions shall not be invariant. Rule 20.7 Requires that expressions resulting from the expansion of macro parameters shall be enclosed in parentheses. Fix violations of above rules in the macro defined in cond unit. Jira NVGPU-3878 Change-Id: Icd5758ae12210e68333c4ab820a36dc48c0aa29e Signed-off-by: ajesh <akv@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2183647 GVS: Gerrit_Virtual_Submit Reviewed-by: Philip Elcan <pelcan@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -55,8 +55,10 @@ void nvgpu_cond_unlock(struct nvgpu_cond *cond);
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#define NVGPU_COND_WAIT_LOCKED(cond, condition, timeout_ms) \
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({ \
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int ret = 0; \
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NVGPU_COND_WAIT_TIMEOUT_LOCKED(cond, condition, ret, \
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timeout_ms ? timeout_ms : \
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u32 cond_timeout_ms = (timeout_ms); \
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NVGPU_COND_WAIT_TIMEOUT_LOCKED((cond), (condition), \
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(ret), \
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((cond_timeout_ms) != 0U) ? (cond_timeout_ms) : \
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NVGPU_COND_WAIT_TIMEOUT_MAX_MS); \
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ret; \
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})
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