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gpu: nvgpu: move circular/pagepool buffer size hals to hal.gr.init unit

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Move g->ops.gr.get_global_ctx_cb_buffer_size() and
g->ops.gr.get_global_ctx_pagepool_buffer_size() hals to hal.gr.init
unit

Move corresponding hal definitions to hal.gr.init unit

Jira NVGPU-2961

Change-Id: Ifff3e2073f6d9bca5b37244f7e107bad885e7ca7
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2077215
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2019-03-15 19:19:46 +05:30
committed by mobile promotions
parent ea545bd497
commit e7047d0151
13 changed files with 50 additions and 48 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
drivers/gpu/nvgpu/common/vgpu/gp10b/vgpu_hal_gp10b.c
View File

@@ -212,10 +212,6 @@ static const struct gpu_ops vgpu_gp10b_ops = {
.get_ctx_pagepool_size = gp10b_gr_get_ctx_pagepool_size,
.get_ctx_betacb_size = gp10b_gr_get_ctx_betacb_size,
.get_ctx_attrib_cb_size = gp10b_gr_get_ctx_attrib_cb_size,
.get_global_ctx_cb_buffer_size =
gk20a_gr_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gk20a_gr_get_global_ctx_pagepool_buffer_size,
.halt_pipe = NULL,
.reset = NULL,
.ctxsw_prog = {
@@ -344,6 +340,10 @@ static const struct gpu_ops vgpu_gp10b_ops = {
gp10b_gr_init_get_alpha_cb_size,
.get_global_attr_cb_size =
gp10b_gr_init_get_global_attr_cb_size,
.get_global_ctx_cb_buffer_size =
gm20b_gr_init_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gm20b_gr_init_get_global_ctx_pagepool_buffer_size,
},
},
.perf = {

4
drivers/gpu/nvgpu/common/vgpu/gr/gr_vgpu.c
View File

@@ -155,13 +155,13 @@ int vgpu_gr_alloc_global_ctx_buffers(struct gk20a *g)
return -ENOMEM;
}
size = g->ops.gr.get_global_ctx_cb_buffer_size(g);
size = g->ops.gr.init.get_global_ctx_cb_buffer_size(g);
nvgpu_log_info(g, "cb_buffer_size : %d", size);
nvgpu_gr_global_ctx_set_size(gr->global_ctx_buffer,
NVGPU_GR_GLOBAL_CTX_CIRCULAR, size);
size = g->ops.gr.get_global_ctx_pagepool_buffer_size(g);
size = g->ops.gr.init.get_global_ctx_pagepool_buffer_size(g);
nvgpu_log_info(g, "pagepool_buffer_size : %d", size);
nvgpu_gr_global_ctx_set_size(gr->global_ctx_buffer,

9
drivers/gpu/nvgpu/common/vgpu/gv11b/vgpu_hal_gv11b.c
View File

@@ -40,6 +40,7 @@
#include "hal/fb/fb_gm20b.h"
#include "hal/fb/fb_gp10b.h"
#include "hal/fb/fb_gv11b.h"
#include "hal/gr/init/gr_init_gm20b.h"
#include "hal/gr/init/gr_init_gv11b.h"
#include "common/netlist/netlist_gv11b.h"
@@ -245,10 +246,6 @@ static const struct gpu_ops vgpu_gv11b_ops = {
.get_ctx_pagepool_size = gv11b_gr_get_ctx_pagepool_size,
.get_ctx_betacb_size = gv11b_gr_get_ctx_betacb_size,
.get_ctx_attrib_cb_size = gv11b_gr_get_ctx_attrib_cb_size,
.get_global_ctx_cb_buffer_size =
gk20a_gr_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gk20a_gr_get_global_ctx_pagepool_buffer_size,
.halt_pipe = NULL,
.reset = NULL,
.ctxsw_prog = {
@@ -391,6 +388,10 @@ static const struct gpu_ops vgpu_gv11b_ops = {
gv11b_gr_init_get_alpha_cb_size,
.get_global_attr_cb_size =
gv11b_gr_init_get_global_attr_cb_size,
.get_global_ctx_cb_buffer_size =
gm20b_gr_init_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gm20b_gr_init_get_global_ctx_pagepool_buffer_size,
},
},
.perf = {

16
drivers/gpu/nvgpu/gk20a/gr_gk20a.c
View File

@@ -1660,7 +1660,7 @@ int gr_gk20a_alloc_global_ctx_buffers(struct gk20a *g)
nvgpu_log_fn(g, " ");
size = g->ops.gr.get_global_ctx_cb_buffer_size(g);
size = g->ops.gr.init.get_global_ctx_cb_buffer_size(g);
nvgpu_log_info(g, "cb_buffer_size : %d", size);
nvgpu_gr_global_ctx_set_size(gr->global_ctx_buffer,
@@ -1668,7 +1668,7 @@ int gr_gk20a_alloc_global_ctx_buffers(struct gk20a *g)
nvgpu_gr_global_ctx_set_size(gr->global_ctx_buffer,
NVGPU_GR_GLOBAL_CTX_CIRCULAR_VPR, size);
size = g->ops.gr.get_global_ctx_pagepool_buffer_size(g);
size = g->ops.gr.init.get_global_ctx_pagepool_buffer_size(g);
nvgpu_log_info(g, "pagepool_buffer_size : %d", size);
nvgpu_gr_global_ctx_set_size(gr->global_ctx_buffer,
@@ -6269,15 +6269,3 @@ u32 gr_gk20a_gpccs_falcon_base_addr(void)
{
return gr_gpcs_gpccs_irqsset_r();
}
u32 gk20a_gr_get_global_ctx_cb_buffer_size(struct gk20a *g)
{
return g->ops.gr.init.get_bundle_cb_default_size(g) *
gr_scc_bundle_cb_size_div_256b_byte_granularity_v();
}
u32 gk20a_gr_get_global_ctx_pagepool_buffer_size(struct gk20a *g)
{
return g->ops.gr.pagepool_default_size(g) *
gr_scc_pagepool_total_pages_byte_granularity_v();
}

2
drivers/gpu/nvgpu/gk20a/gr_gk20a.h
View File

@@ -545,6 +545,4 @@ void gk20a_gr_flush_channel_tlb(struct gr_gk20a *gr);
u32 gk20a_gr_get_fecs_ctx_state_store_major_rev_id(struct gk20a *g);
u32 gr_gk20a_fecs_falcon_base_addr(void);
u32 gr_gk20a_gpccs_falcon_base_addr(void);
u32 gk20a_gr_get_global_ctx_cb_buffer_size(struct gk20a *g);
u32 gk20a_gr_get_global_ctx_pagepool_buffer_size(struct gk20a *g);
#endif /*__GR_GK20A_H__*/

8
drivers/gpu/nvgpu/gm20b/hal_gm20b.c
View File

@@ -326,10 +326,6 @@ static const struct gpu_ops gm20b_ops = {
gk20a_gr_get_fecs_ctx_state_store_major_rev_id,
.init_gfxp_rtv_cb = NULL,
.log_mme_exception = NULL,
.get_global_ctx_cb_buffer_size =
gk20a_gr_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gk20a_gr_get_global_ctx_pagepool_buffer_size,
.halt_pipe = gr_gk20a_halt_pipe,
.reset = gk20a_gr_reset,
.ctxsw_prog = {
@@ -453,6 +449,10 @@ static const struct gpu_ops gm20b_ops = {
gm20b_gr_init_get_alpha_cb_size,
.get_global_attr_cb_size =
gm20b_gr_init_get_global_attr_cb_size,
.get_global_ctx_cb_buffer_size =
gm20b_gr_init_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gm20b_gr_init_get_global_ctx_pagepool_buffer_size,
},
},
.fb = {

8
drivers/gpu/nvgpu/gp10b/hal_gp10b.c
View File

@@ -363,10 +363,6 @@ static const struct gpu_ops gp10b_ops = {
.get_ctx_pagepool_size = gp10b_gr_get_ctx_pagepool_size,
.get_ctx_betacb_size = gp10b_gr_get_ctx_betacb_size,
.get_ctx_attrib_cb_size = gp10b_gr_get_ctx_attrib_cb_size,
.get_global_ctx_cb_buffer_size =
gk20a_gr_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gk20a_gr_get_global_ctx_pagepool_buffer_size,
.halt_pipe = gr_gk20a_halt_pipe,
.reset = gk20a_gr_reset,
.ctxsw_prog = {
@@ -529,6 +525,10 @@ static const struct gpu_ops gp10b_ops = {
gp10b_gr_init_get_alpha_cb_size,
.get_global_attr_cb_size =
gp10b_gr_init_get_global_attr_cb_size,
.get_global_ctx_cb_buffer_size =
gm20b_gr_init_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gm20b_gr_init_get_global_ctx_pagepool_buffer_size,
},
},
.fb = {

8
drivers/gpu/nvgpu/gv100/hal_gv100.c
View File

@@ -486,10 +486,6 @@ static const struct gpu_ops gv100_ops = {
.get_ctx_pagepool_size = gp10b_gr_get_ctx_pagepool_size,
.get_ctx_betacb_size = gp10b_gr_get_ctx_betacb_size,
.get_ctx_attrib_cb_size = gp10b_gr_get_ctx_attrib_cb_size,
.get_global_ctx_cb_buffer_size =
gk20a_gr_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gk20a_gr_get_global_ctx_pagepool_buffer_size,
.halt_pipe = gr_gk20a_halt_pipe,
.reset = gk20a_gr_reset,
.ctxsw_prog = {
@@ -668,6 +664,10 @@ static const struct gpu_ops gv100_ops = {
gv11b_gr_init_get_alpha_cb_size,
.get_global_attr_cb_size =
gv11b_gr_init_get_global_attr_cb_size,
.get_global_ctx_cb_buffer_size =
gm20b_gr_init_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gm20b_gr_init_get_global_ctx_pagepool_buffer_size,
},
},
.fb = {

8
drivers/gpu/nvgpu/gv11b/hal_gv11b.c
View File

@@ -445,10 +445,6 @@ static const struct gpu_ops gv11b_ops = {
.get_ctx_pagepool_size = gv11b_gr_get_ctx_pagepool_size,
.get_ctx_betacb_size = gv11b_gr_get_ctx_betacb_size,
.get_ctx_attrib_cb_size = gv11b_gr_get_ctx_attrib_cb_size,
.get_global_ctx_cb_buffer_size =
gk20a_gr_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gk20a_gr_get_global_ctx_pagepool_buffer_size,
.get_ctxsw_checksum_mismatch_mailbox_val =
gr_gv11b_ctxsw_checksum_mismatch_mailbox_val,
.halt_pipe = gr_gk20a_halt_pipe,
@@ -627,6 +623,10 @@ static const struct gpu_ops gv11b_ops = {
gv11b_gr_init_get_alpha_cb_size,
.get_global_attr_cb_size =
gv11b_gr_init_get_global_attr_cb_size,
.get_global_ctx_cb_buffer_size =
gm20b_gr_init_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gm20b_gr_init_get_global_ctx_pagepool_buffer_size,
},
},
.fb = {

12
drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.c
View File

@@ -740,3 +740,15 @@ u32 gm20b_gr_init_get_global_attr_cb_size(struct gk20a *g, u32 tpc_count,
return size;
}
u32 gm20b_gr_init_get_global_ctx_cb_buffer_size(struct gk20a *g)
{
return g->ops.gr.init.get_bundle_cb_default_size(g) *
gr_scc_bundle_cb_size_div_256b_byte_granularity_v();
}
u32 gm20b_gr_init_get_global_ctx_pagepool_buffer_size(struct gk20a *g)
{
return g->ops.gr.pagepool_default_size(g) *
gr_scc_pagepool_total_pages_byte_granularity_v();
}

2
drivers/gpu/nvgpu/hal/gr/init/gr_init_gm20b.h
View File

@@ -65,5 +65,7 @@ u32 gm20b_gr_init_get_attrib_cb_size(struct gk20a *g, u32 tpc_count);
u32 gm20b_gr_init_get_alpha_cb_size(struct gk20a *g, u32 tpc_count);
u32 gm20b_gr_init_get_global_attr_cb_size(struct gk20a *g, u32 tpc_count,
u32 max_tpc);
u32 gm20b_gr_init_get_global_ctx_cb_buffer_size(struct gk20a *g);
u32 gm20b_gr_init_get_global_ctx_pagepool_buffer_size(struct gk20a *g);
#endif /* NVGPU_GR_INIT_GM20B_H */

5
drivers/gpu/nvgpu/include/nvgpu/gk20a.h
View File

@@ -491,8 +491,6 @@ struct gpu_ops {
u32 (*get_ctx_pagepool_size)(struct gk20a *g);
u32 (*get_ctx_betacb_size)(struct gk20a *g);
u32 (*get_ctx_attrib_cb_size)(struct gk20a *g, u32 betacb_size);
u32 (*get_global_ctx_cb_buffer_size)(struct gk20a *g);
u32 (*get_global_ctx_pagepool_buffer_size)(struct gk20a *g);
int (*halt_pipe)(struct gk20a *g);
int (*reset)(struct gk20a *g);
struct {
@@ -710,6 +708,9 @@ struct gpu_ops {
u32 tpc_count);
u32 (*get_global_attr_cb_size)(struct gk20a *g,
u32 tpc_count, u32 max_tpc);
u32 (*get_global_ctx_cb_buffer_size)(struct gk20a *g);
u32 (*get_global_ctx_pagepool_buffer_size)(
struct gk20a *g);
} init;
u32 (*get_ctxsw_checksum_mismatch_mailbox_val)(void);

8
drivers/gpu/nvgpu/tu104/hal_tu104.c
View File

@@ -514,10 +514,6 @@ static const struct gpu_ops tu104_ops = {
.get_ctx_pagepool_size = gp10b_gr_get_ctx_pagepool_size,
.get_ctx_betacb_size = gp10b_gr_get_ctx_betacb_size,
.get_ctx_attrib_cb_size = gp10b_gr_get_ctx_attrib_cb_size,
.get_global_ctx_cb_buffer_size =
gk20a_gr_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gk20a_gr_get_global_ctx_pagepool_buffer_size,
.halt_pipe = gr_gk20a_halt_pipe,
.reset = gk20a_gr_reset,
.ctxsw_prog = {
@@ -700,6 +696,10 @@ static const struct gpu_ops tu104_ops = {
gv11b_gr_init_get_alpha_cb_size,
.get_global_attr_cb_size =
gv11b_gr_init_get_global_attr_cb_size,
.get_global_ctx_cb_buffer_size =
gm20b_gr_init_get_global_ctx_cb_buffer_size,
.get_global_ctx_pagepool_buffer_size =
gm20b_gr_init_get_global_ctx_pagepool_buffer_size,
},
},
.fb = {