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gpu: nvgpu: Hard code regops max batch size
We set the regops limit in common code to a hard coded value and access it in Linux code. Change the responsibility so that regops limit is set in Linux code in the GPU characteristics query to a hard coded value and just use the same hard coded value in the IOCTL limit check. JIRA NVGPU-259 Change-Id: I2f78a7ea8f1cb68a08633a2dc74b71b3b001e5c9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1593682 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Peter Daifuku <pdaifuku@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -33,6 +33,7 @@
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#include <nvgpu/linux/vidmem.h>
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#include "ioctl_ctrl.h"
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#include "ioctl_dbg.h"
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#ifdef CONFIG_TEGRA_19x_GPU
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#include "common/linux/ioctl_ctrl_t19x.h"
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#endif
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@@ -207,6 +208,7 @@ gk20a_ctrl_ioctl_gpu_characteristics(
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pgpu->arch = g->params.gpu_arch;
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pgpu->impl = g->params.gpu_impl;
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pgpu->rev = g->params.gpu_rev;
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pgpu->reg_ops_limit = NVGPU_IOCTL_DBG_REG_OPS_LIMIT;
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pgpu->vbios_version = g->bios.vbios_version;
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pgpu->vbios_oem_version = g->bios.vbios_oem_version;
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@@ -607,7 +607,7 @@ static int nvgpu_ioctl_channel_reg_ops(struct dbg_session_gk20a *dbg_s,
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gk20a_dbg_fn("%d ops, max fragment %d", args->num_ops, g->dbg_regops_tmp_buf_ops);
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if (args->num_ops > g->gpu_characteristics.reg_ops_limit) {
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if (args->num_ops > NVGPU_IOCTL_DBG_REG_OPS_LIMIT) {
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nvgpu_err(g, "regops limit exceeded");
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return -EINVAL;
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}
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@@ -21,6 +21,10 @@
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#include "gk20a/dbg_gpu_gk20a.h"
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/* NVGPU_DBG_GPU_IOCTL_REG_OPS: the upper limit for the number
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* of regops */
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#define NVGPU_IOCTL_DBG_REG_OPS_LIMIT 1024
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struct dbg_session_gk20a_linux {
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struct device *dev;
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struct dbg_session_gk20a dbg_s;
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@@ -488,8 +488,6 @@ int gk20a_init_gpu_characteristics(struct gk20a *g)
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gpu->pci_class = g->pci_class;
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gpu->pci_revision = g->pci_revision;
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gpu->reg_ops_limit = 1024;
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return 0;
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}
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