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gpu: nvgpu: fix compilation issues

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compiling kernel with clang pointed out below issues in nvgpu.
Fixing them.

gr_gk20a.c:1185:12: error: stack frame size of 3152 bytes in
function 'gr_gk20a_setup_alpha_beta_tables'

cde_gk20a.c:1376:22: error: duplicate 'const' declaration
cde_gk20a.c:1377:22: error: duplicate 'const' declaration
cde_gk20a.c:1378:22: error: duplicate 'const' declaration

ctxsw_trace_gk20a.c:71:19: error: unused function 'ring_space'

platform_gk20a_tegra.c:55:19: error: unused function 'pmc_read'
platform_gk20a_tegra.c:60:20: error: unused function 'pmc_write'

bug 1745660

Change-Id: I8cd4383cb898307bbeb162ca00b3e20d04de2c90
Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/1150486
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Sri Krishna chowdary
2016-05-24 11:02:46 +05:30
committed by Terje Bergstrom
parent d16da3baec
commit e82c840119
4 changed files with 13 additions and 13 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/nvgpu/Makefile
View File

@@ -8,6 +8,7 @@ ccflags-y += -I../kernel-nvgpu/include/uapi
ccflags-y += -Wno-multichar
ccflags-y += -Werror
ccflags-y += -Wno-error=cpp
ccflags-y += -Wno-duplicate-decl-specifier
ifeq ($(CONFIG_ARCH_TEGRA_18x_SOC),y)
ccflags-y += -I$(srctree)/../kernel-nvgpu-t18x/drivers/gpu/nvgpu

5
drivers/gpu/nvgpu/gk20a/ctxsw_trace_gk20a.c
View File

@@ -70,11 +70,6 @@ static inline int ring_len(struct nvgpu_ctxsw_ring_header *hdr)
return (hdr->write_idx - hdr->read_idx) % hdr->num_ents;
}
static inline int ring_space(struct nvgpu_ctxsw_ring_header *hdr)
{
return (hdr->read_idx - hdr->write_idx - 1) % hdr->num_ents;
}
ssize_t gk20a_ctxsw_dev_read(struct file *filp, char __user *buf, size_t size,
loff_t *off)
{

16
drivers/gpu/nvgpu/gk20a/gr_gk20a.c
View File

@@ -1203,15 +1203,18 @@ static int gr_gk20a_setup_alpha_beta_tables(struct gk20a *g,
u32 reg_offset;
bool assign_alpha;
u32 map_alpha[gr_pd_alpha_ratio_table__size_1_v()];
u32 map_beta[gr_pd_alpha_ratio_table__size_1_v()];
u32 map_reg_used[gr_pd_alpha_ratio_table__size_1_v()];
u32 *map_alpha;
u32 *map_beta;
u32 *map_reg_used;
gk20a_dbg_fn("");
memset(map_alpha, 0, gr_pd_alpha_ratio_table__size_1_v() * sizeof(u32));
memset(map_beta, 0, gr_pd_alpha_ratio_table__size_1_v() * sizeof(u32));
memset(map_reg_used, 0, gr_pd_alpha_ratio_table__size_1_v() * sizeof(u32));
map_alpha = kzalloc(3 * gr_pd_alpha_ratio_table__size_1_v() *
sizeof(u32), GFP_KERNEL);
if (!map_alpha)
return -ENOMEM;
map_beta = map_alpha + gr_pd_alpha_ratio_table__size_1_v();
map_reg_used = map_beta + gr_pd_alpha_ratio_table__size_1_v();
for (row = 0; row < rows; ++row) {
alpha_target = max_t(u32, gr->tpc_count * row / rows, 1);
@@ -1277,6 +1280,7 @@ static int gr_gk20a_setup_alpha_beta_tables(struct gk20a *g,
}
}
kfree(map_alpha);
return 0;
}

4
drivers/gpu/nvgpu/gk20a/platform_gk20a_tegra.c
View File

@@ -52,12 +52,12 @@ struct gk20a_emc_params {
};
static void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE);
static inline u32 pmc_read(unsigned long reg)
static inline u32 __maybe_unused pmc_read(unsigned long reg)
{
return readl(pmc + reg);
}
static inline void pmc_write(u32 val, unsigned long reg)
static inline void __maybe_unused pmc_write(u32 val, unsigned long reg)
{
writel_relaxed(val, pmc + reg);
}