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gpu: nvgpu: handle memfmt exception

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In gk20a_gr_isr(), handle memfmt exception as below :
- read NV_PGRAPH_PRI_MEMFMT_HWW_ESR
- debug print for contents of above register
- write same value back to NV_PGRAPH_PRI_MEMFMT_HWW_ESR and
  clear the exception

Bug 200078514

Change-Id: I5b9afacd7f99b5a37de953041582b3a53b863642
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/713713
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Deepak Nibade
2015-03-04 14:55:32 +05:30
committed by Dan Willemsen
parent a0dcd3b203
commit e9f2436c29
3 changed files with 15 additions and 0 deletions
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7
drivers/gpu/nvgpu/gk20a/gr_gk20a.c
View File

@@ -5740,6 +5740,13 @@ int gk20a_gr_isr(struct gk20a *g)
need_reset |= -EFAULT;
}
if (exception & gr_exception_memfmt_m()) {
u32 memfmt = gk20a_readl(g, gr_memfmt_hww_esr_r());
gk20a_dbg(gpu_dbg_intr, "memfmt exception %08x\n",
memfmt);
gk20a_writel(g, gr_memfmt_hww_esr_r(), memfmt);
}
/* check if a gpc exception has occurred */
if (exception & gr_exception_gpc_m() && need_reset == 0) {
struct channel_gk20a *fault_ch;

4
drivers/gpu/nvgpu/gk20a/hw_gr_gk20a.h
View File

@@ -178,6 +178,10 @@ static inline u32 gr_exception_gpc_m(void)
{
return 0x1 << 24;
}
static inline u32 gr_exception_memfmt_m(void)
{
return 0x1 << 1;
}
static inline u32 gr_exception1_r(void)
{
return 0x00400118;

4
drivers/gpu/nvgpu/gm20b/hw_gr_gm20b.h
View File

@@ -166,6 +166,10 @@ static inline u32 gr_exception_gpc_m(void)
{
return 0x1 << 24;
}
static inline u32 gr_exception_memfmt_m(void)
{
return 0x1 << 1;
}
static inline u32 gr_exception1_r(void)
{
return 0x00400118;