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gpu: nvgpu: conditional compilation of nvhost code

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There were few more nvhost related references unprotected by the config
flag. Fix those.

Bug 2834141

Change-Id: Id7d94e3e6fa471f02697d121b557884c7287c26e
Signed-off-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2306437
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
GVS: Gerrit_Virtual_Submit
This commit is contained in:
Sagar Kamble
2020-03-03 14:36:27 +05:30
committed by Alex Waterman
parent 147564cbd5
commit ea09ef92b5
8 changed files with 31 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/gpu/nvgpu/hal/sync/syncpt_cmdbuf_gv11b.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
@@ -23,6 +23,7 @@
#define NVGPU_SYNC_SYNCPT_CMDBUF_GV11B_H
#include <nvgpu/types.h>
#include <nvgpu/errno.h>
struct gk20a;
struct priv_cmd_entry;

8
drivers/gpu/nvgpu/os/linux/pci.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -149,7 +149,9 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40),
.hardcode_sw_threshold = false,
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.has_syncpoints = true,
#endif
},
/* 0x1eb0 (RTX 5000 : TU104 based) */
@@ -186,7 +188,9 @@ static struct gk20a_platform nvgpu_pci_device[] = {
.honors_aperture = true,
.dma_mask = DMA_BIT_MASK(40),
.hardcode_sw_threshold = false,
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.has_syncpoints = true,
#endif
},
};
@@ -608,6 +612,7 @@ static int nvgpu_pci_probe(struct pci_dev *pdev,
nvgpu_set_enabled(g, NVGPU_SUPPORT_NVLINK, false);
nvgpu_set_enabled(g, NVGPU_HAS_SYNCPOINTS, false);
} else {
#ifdef CONFIG_TEGRA_GK20A_NVHOST
err = nvgpu_nvhost_syncpt_init(g);
if (err) {
if (err != -ENOSYS) {
@@ -615,6 +620,7 @@ static int nvgpu_pci_probe(struct pci_dev *pdev,
goto err_free_irq;
}
}
#endif
}
err = nvgpu_get_dt_clock_limit(g, &g->dgpu_max_clk);

2
drivers/gpu/nvgpu/os/linux/platform_gk20a_tegra.c
View File

@@ -903,7 +903,9 @@ static int gk20a_clk_get_freqs(struct device *dev,
#endif
struct gk20a_platform gm20b_tegra_platform = {
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.has_syncpoints = true,
#endif
.aggressive_sync_destroy_thresh = 64,
/* power management configuration */

4
drivers/gpu/nvgpu/os/linux/platform_gp10b_tegra.c
View File

@@ -153,9 +153,9 @@ static int gp10b_tegra_probe(struct device *dev)
struct device_node *of_chosen;
bool joint_xpu_rail = false;
struct gk20a *g = platform->g;
#ifdef CONFIG_TEGRA_GK20A_NVHOST
int ret;
#ifdef CONFIG_TEGRA_GK20A_NVHOST
ret = nvgpu_get_nvhost_dev(platform->g);
if (ret)
return ret;
@@ -444,7 +444,9 @@ int gp10b_clk_get_freqs(struct device *dev,
}
struct gk20a_platform gp10b_tegra_platform = {
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.has_syncpoints = true,
#endif
/* power management configuration */
.railgate_delay_init = 500,

4
drivers/gpu/nvgpu/os/linux/platform_gv11b_tegra.c
View File

@@ -81,11 +81,13 @@ static int gv11b_tegra_probe(struct device *dev)
bool joint_xpu_rail = false;
struct gk20a *g = platform->g;
#ifdef CONFIG_TEGRA_GK20A_NVHOST
err = nvgpu_nvhost_syncpt_init(platform->g);
if (err) {
if (err != -ENOSYS)
return err;
}
#endif
err = gk20a_tegra_init_secure_alloc(platform);
if (err)
@@ -255,7 +257,9 @@ static void gv11b_tegra_set_tpc_pg_mask(struct device *dev, u32 tpc_pg_mask)
}
struct gk20a_platform gv11b_tegra_platform = {
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.has_syncpoints = true,
#endif
/* ptimer src frequency in hz*/
.ptimer_src_freq = 31250000,

7
drivers/gpu/nvgpu/os/linux/soc.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2017-2020, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -78,6 +78,7 @@ static u64 nvgpu_tegra_hv_ipa_pa(struct gk20a *g, u64 ipa, u64 *pa_len)
err = hyp_read_ipa_pa_info(&info, platform->vmid, ipa);
if (err < 0) {
#ifdef CONFIG_TEGRA_GK20A_NVHOST
/* WAR for bug 2096877
* hyp_read_ipa_pa_info only looks up RAM mappings.
* assume one to one IPA:PA mapping for syncpt aperture
@@ -93,6 +94,10 @@ static u64 nvgpu_tegra_hv_ipa_pa(struct gk20a *g, u64 ipa, u64 *pa_len)
nvgpu_err(g, "ipa=%llx translation failed vmid=%u err=%d",
ipa, platform->vmid, err);
}
#else
nvgpu_err(g, "ipa=%llx translation failed vmid=%u err=%d",
ipa, platform->vmid, err);
#endif
} else {
pa = info.base + info.offset;
if (pa_len != NULL) {

4
drivers/gpu/nvgpu/os/linux/vgpu/gv11b/platform_gv11b_vgpu_tegra.c
View File

@@ -35,7 +35,9 @@ static int gv11b_vgpu_probe(struct device *dev)
void __iomem *regs;
struct nvgpu_os_linux *l = nvgpu_os_linux_from_gk20a(platform->g);
struct gk20a *g = platform->g;
#ifdef CONFIG_TEGRA_GK20A_NVHOST
int ret;
#endif
r = platform_get_resource_byname(pdev, IORESOURCE_MEM, "usermode");
if (!r) {
@@ -75,7 +77,9 @@ static int gv11b_vgpu_probe(struct device *dev)
}
struct gk20a_platform gv11b_vgpu_tegra_platform = {
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.has_syncpoints = true,
#endif
/* power management configuration */
.can_railgate_init = false,

4
drivers/gpu/nvgpu/os/linux/vgpu/platform_vgpu_tegra.c
View File

@@ -1,7 +1,7 @@
/*
* Tegra Virtualized GPU Platform Interface
*
* Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
* Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
@@ -64,7 +64,9 @@ int vgpu_plat_clk_cap_rate(struct device *dev, unsigned long rate)
}
struct gk20a_platform vgpu_tegra_platform = {
#ifdef CONFIG_TEGRA_GK20A_NVHOST
.has_syncpoints = true,
#endif
.aggressive_sync_destroy_thresh = 64,
/* power management configuration */