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gpu: nvgpu: fix L3 alloc bit
Last minute rebase of commit afa31cdd8c on
top of reworked memory infrastucture introduced a bug where we actually
need to set BIT(36) in physical address but we ended up ORing the
address by "36"
Fix this by by adding correct value BIT(36) instead of 36
Jira GPUT19X-10
Bug 200279508
Change-Id: Ib587849c75f57dda5ad802b8389b7563b8b690ed
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1529511
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
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@@ -32,7 +32,7 @@
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#include <nvgpu/hw/gv11b/hw_gmmu_gv11b.h>
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#include <nvgpu/hw/gv11b/hw_bus_gv11b.h>
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#define NVGPU_L3_ALLOC_BIT 36
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#define NVGPU_L3_ALLOC_BIT BIT(36)
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static bool gv11b_mm_is_bar1_supported(struct gk20a *g)
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{
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