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gpu: nvgpu: Fix CERT INT31-C error in gr.falcon unit

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Modify nvgpu_gr_checksum_u32 code from
(u32)(((u64)a + (u64)b) % (U32_MAX))
to nvgpu_safe_cast_u64_to_u32(((u64)a + (u64)b) & (U32_MAX)).
This function returns the last 32bits.

Jira NVGPU-3622

Change-Id: I8d348a624a5930b7ba813b0a74af270b49b03844
Signed-off-by: Vinod G <vinodg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2140254
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vinod G
2019-06-20 11:33:46 -07:00
committed by mobile promotions
parent 7ed189de44
commit eaae1afdae
1 changed files with 2 additions and 1 deletions
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3
drivers/gpu/nvgpu/include/nvgpu/gr/gr_utils.h
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@@ -24,6 +24,7 @@
#define NVGPU_GR_UTILS_H
#include <nvgpu/types.h>
#include <nvgpu/safe_ops.h>
struct gk20a;
struct nvgpu_gr_falcon;
@@ -40,7 +41,7 @@ struct nvgpu_gr_global_ctx_buffer_desc;
static inline u32 nvgpu_gr_checksum_u32(u32 a, u32 b)
{
return (u32)(((u64)a + (u64)b) % (U32_MAX));
return nvgpu_safe_cast_u64_to_u32(((u64)a + (u64)b) & (U32_MAX));
}
/* gr struct pointers */