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gpu: nvgpu: define common API to write fuses

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We use tegra_fuse_control_write() on k4.4 and
tegra_fuse_writel() on previous versions

But gr_gm20b_set_gpc_tpc_mask() currently broken
since we use tegra_fuse_writel() always to
update fuses

Hence define tegra_fuse_control_write() on
previous kernel versions as well and use
it everywhere

Bug 200262155

Change-Id: I116ed77d24018dae21884344373c9eaa1750c2bd
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/1270168
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Deepak Nibade
2016-12-13 14:09:27 +05:30
committed by mobile promotions
parent 145225b896
commit ec102080ab
2 changed files with 7 additions and 11 deletions
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17
drivers/gpu/nvgpu/gm20b/gr_gm20b.c
View File

@@ -511,23 +511,18 @@ static u32 gr_gm20b_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
static void gr_gm20b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
{
#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
tegra_fuse_writel(0x1, FUSE_FUSEBYPASS_0);
tegra_fuse_writel(0x0, FUSE_WRITE_ACCESS_SW_0);
#else
tegra_fuse_control_write(0x1, FUSE_FUSEBYPASS_0);
tegra_fuse_control_write(0x0, FUSE_WRITE_ACCESS_SW_0);
#endif
if (g->gr.gpc_tpc_mask[gpc_index] == 0x1) {
tegra_fuse_writel(0x0, FUSE_OPT_GPU_TPC0_DISABLE_0);
tegra_fuse_writel(0x1, FUSE_OPT_GPU_TPC1_DISABLE_0);
tegra_fuse_control_write(0x0, FUSE_OPT_GPU_TPC0_DISABLE_0);
tegra_fuse_control_write(0x1, FUSE_OPT_GPU_TPC1_DISABLE_0);
} else if (g->gr.gpc_tpc_mask[gpc_index] == 0x2) {
tegra_fuse_writel(0x1, FUSE_OPT_GPU_TPC0_DISABLE_0);
tegra_fuse_writel(0x0, FUSE_OPT_GPU_TPC1_DISABLE_0);
tegra_fuse_control_write(0x1, FUSE_OPT_GPU_TPC0_DISABLE_0);
tegra_fuse_control_write(0x0, FUSE_OPT_GPU_TPC1_DISABLE_0);
} else {
tegra_fuse_writel(0x0, FUSE_OPT_GPU_TPC0_DISABLE_0);
tegra_fuse_writel(0x0, FUSE_OPT_GPU_TPC1_DISABLE_0);
tegra_fuse_control_write(0x0, FUSE_OPT_GPU_TPC0_DISABLE_0);
tegra_fuse_control_write(0x0, FUSE_OPT_GPU_TPC1_DISABLE_0);
}
}

1
drivers/gpu/nvgpu/gm20b/gr_gm20b.h
View File

@@ -29,6 +29,7 @@ enum {
};
#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
#define tegra_fuse_control_write tegra_fuse_writel
#define FUSE_FUSEBYPASS_0 0x24
#define FUSE_WRITE_ACCESS_SW_0 0x30
#define FUSE_OPT_GPU_TPC0_DISABLE_0 0x30C