nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-23 18:16:01 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: Fix MISRA 15.7 violation in nvlink

Browse Source 
MISRA 15.7 does not allow empty terminating "else" statement.
Fix such violations in nvlink by adding else clause.

JIRA NVGPU-1921

Change-Id: I29c276ac612adc56d7405c5e9b28ee4b41ba21fa
Signed-off-by: Tejal Kudav <tkudav@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2027262
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sagar Kamble <skamble@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Tejal Kudav
2019-02-25 12:58:09 +05:30
committed by mobile promotions
parent f357136ff9
commit ec513e4a1a
1 changed files with 48 additions and 47 deletions
Download Patch File Download Diff File Expand all files Collapse all files

95
drivers/gpu/nvgpu/common/nvlink/nvlink_gv100.c
View File

@@ -1387,13 +1387,10 @@ int gv100_nvlink_link_set_mode(struct gk20a *g, u32 link_id,
if (state == nvl_link_state_state_swcfg_v()) { if (state == nvl_link_state_state_swcfg_v()) {
nvgpu_warn(g, "link is already in safe mode"); nvgpu_warn(g, "link is already in safe mode");
break; break;
} } else if (state == nvl_link_state_state_hwcfg_v()) {
if (state == nvl_link_state_state_hwcfg_v()) {
nvgpu_warn(g, "link is transitioning to safe mode"); nvgpu_warn(g, "link is transitioning to safe mode");
break; break;
} } else if (state == nvl_link_state_state_init_v()) {
if (state == nvl_link_state_state_init_v()) {
/* Off to Safe transition */ /* Off to Safe transition */
reg = DLPL_REG_RD32(g, link_id, nvl_link_change_r()); reg = DLPL_REG_RD32(g, link_id, nvl_link_change_r());
reg = set_field(reg, nvl_link_change_newstate_m(), reg = set_field(reg, nvl_link_change_newstate_m(),
@@ -1416,6 +1413,10 @@ int gv100_nvlink_link_set_mode(struct gk20a *g, u32 link_id,
reg = set_field(reg, nvl_link_change_action_m(), reg = set_field(reg, nvl_link_change_action_m(),
nvl_link_change_action_ltssm_change_f()); nvl_link_change_action_ltssm_change_f());
DLPL_REG_WR32(g, link_id, nvl_link_change_r(), reg); DLPL_REG_WR32(g, link_id, nvl_link_change_r(), reg);
} else {
nvgpu_err(g,
"Link state transition to Safe mode not permitted");
return -EPERM;
} }
break; break;
@@ -1544,21 +1545,21 @@ int gv100_nvlink_link_set_sublink_mode(struct gk20a *g, u32 link_id,
nvl_sl0_slsm_status_tx_primary_state_off_v()) { nvl_sl0_slsm_status_tx_primary_state_off_v()) {
nvgpu_err(g, "TX cannot be do from OFF to HS"); nvgpu_err(g, "TX cannot be do from OFF to HS");
return -EPERM; return -EPERM;
} } else {
reg = DLPL_REG_RD32(g, link_id, nvl_sublink_change_r());
reg = set_field(reg, nvl_sublink_change_newstate_m(),
nvl_sublink_change_newstate_hs_f());
reg = set_field(reg, nvl_sublink_change_sublink_m(),
nvl_sublink_change_sublink_tx_f());
reg = set_field(reg, nvl_sublink_change_action_m(),
nvl_sublink_change_action_slsm_change_f());
DLPL_REG_WR32(g, link_id, nvl_sublink_change_r(), reg);
reg = DLPL_REG_RD32(g, link_id, nvl_sublink_change_r()); err = gv100_nvlink_link_sublink_check_change(g, link_id);
reg = set_field(reg, nvl_sublink_change_newstate_m(), if (err != 0) {
nvl_sublink_change_newstate_hs_f()); nvgpu_err(g, "Error in TX to HS");
reg = set_field(reg, nvl_sublink_change_sublink_m(), return err;
nvl_sublink_change_sublink_tx_f()); }
reg = set_field(reg, nvl_sublink_change_action_m(),
nvl_sublink_change_action_slsm_change_f());
DLPL_REG_WR32(g, link_id, nvl_sublink_change_r(), reg);
err = gv100_nvlink_link_sublink_check_change(g, link_id);
if (err != 0) {
nvgpu_err(g, "Error in TX to HS");
return err;
} }
break; break;
case nvgpu_nvlink_sublink_tx_common: case nvgpu_nvlink_sublink_tx_common:
@@ -1604,21 +1605,21 @@ int gv100_nvlink_link_set_sublink_mode(struct gk20a *g, u32 link_id,
nvl_sl0_slsm_status_tx_primary_state_hs_v()) { nvl_sl0_slsm_status_tx_primary_state_hs_v()) {
nvgpu_err(g, " TX cannot go off from HS %d", link_id); nvgpu_err(g, " TX cannot go off from HS %d", link_id);
return -EPERM; return -EPERM;
} } else {
reg = DLPL_REG_RD32(g, link_id, nvl_sublink_change_r());
reg = set_field(reg, nvl_sublink_change_newstate_m(),
nvl_sublink_change_newstate_off_f());
reg = set_field(reg, nvl_sublink_change_sublink_m(),
nvl_sublink_change_sublink_tx_f());
reg = set_field(reg, nvl_sublink_change_action_m(),
nvl_sublink_change_action_slsm_change_f());
DLPL_REG_WR32(g, link_id, nvl_sublink_change_r(), reg);
reg = DLPL_REG_RD32(g, link_id, nvl_sublink_change_r()); err = gv100_nvlink_link_sublink_check_change(g, link_id);
reg = set_field(reg, nvl_sublink_change_newstate_m(), if (err != 0) {
nvl_sublink_change_newstate_off_f()); nvgpu_err(g, "Error in TX to OFF");
reg = set_field(reg, nvl_sublink_change_sublink_m(), return err;
nvl_sublink_change_sublink_tx_f()); }
reg = set_field(reg, nvl_sublink_change_action_m(),
nvl_sublink_change_action_slsm_change_f());
DLPL_REG_WR32(g, link_id, nvl_sublink_change_r(), reg);
err = gv100_nvlink_link_sublink_check_change(g, link_id);
if (err != 0) {
nvgpu_err(g, "Error in TX to OFF");
return err;
} }
break; break;
@@ -1635,21 +1636,21 @@ int gv100_nvlink_link_set_sublink_mode(struct gk20a *g, u32 link_id,
nvl_sl1_slsm_status_rx_primary_state_hs_v()) { nvl_sl1_slsm_status_rx_primary_state_hs_v()) {
nvgpu_err(g, " RX cannot go off from HS %d", link_id); nvgpu_err(g, " RX cannot go off from HS %d", link_id);
return -EPERM; return -EPERM;
} } else {
reg = DLPL_REG_RD32(g, link_id, nvl_sublink_change_r());
reg = set_field(reg, nvl_sublink_change_newstate_m(),
nvl_sublink_change_newstate_off_f());
reg = set_field(reg, nvl_sublink_change_sublink_m(),
nvl_sublink_change_sublink_rx_f());
reg = set_field(reg, nvl_sublink_change_action_m(),
nvl_sublink_change_action_slsm_change_f());
DLPL_REG_WR32(g, link_id, nvl_sublink_change_r(), reg);
reg = DLPL_REG_RD32(g, link_id, nvl_sublink_change_r()); err = gv100_nvlink_link_sublink_check_change(g, link_id);
reg = set_field(reg, nvl_sublink_change_newstate_m(), if (err != 0) {
nvl_sublink_change_newstate_off_f()); nvgpu_err(g, "Error in RX to OFF");
reg = set_field(reg, nvl_sublink_change_sublink_m(), return err;
nvl_sublink_change_sublink_rx_f()); }
reg = set_field(reg, nvl_sublink_change_action_m(),
nvl_sublink_change_action_slsm_change_f());
DLPL_REG_WR32(g, link_id, nvl_sublink_change_r(), reg);
err = gv100_nvlink_link_sublink_check_change(g, link_id);
if (err != 0) {
nvgpu_err(g, "Error in RX to OFF");
return err;
} }
break; break;
case nvgpu_nvlink_sublink_rx_rxcal: case nvgpu_nvlink_sublink_rx_rxcal: