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gpu: nvgpu: add NVGPU_SUPPORT_COMPRESSION flag

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Add NVGPU_SUPPORT_COMPRESSION to indicate if compression feature is
supported in nvgpu. If not, set cbc.init, cbc.ctrl and
cbc.alloc_comptags hals to NULL.
Add corresponding GPU characteristics flag and IOCTL mapping to sync
compression support status with nvrm_gpu.

JIRA NVGPU-4666

Change-Id: I2e685688ddac592b3bb918ee70c82ea5524d695a
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2338926
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Vedashree Vidwans
2020-05-04 15:04:42 -07:00
committed by Alex Waterman
parent cfc5bac059
commit ee216bc941
7 changed files with 49 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/nvgpu/hal/init/hal_gm20b.c
View File

@@ -1241,6 +1241,16 @@ int gm20b_init_hal(struct gk20a *g)
#endif
}
#ifdef CONFIG_NVGPU_COMPRESSION
nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
gops->cbc.init = NULL;
gops->cbc.ctrl = NULL;
gops->cbc.alloc_comptags = NULL;
}
#endif
#ifdef CONFIG_NVGPU_GRAPHICS
nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, false);
nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, false);

10
drivers/gpu/nvgpu/hal/init/hal_gp10b.c
View File

@@ -1342,6 +1342,16 @@ int gp10b_init_hal(struct gk20a *g)
#endif
}
#ifdef CONFIG_NVGPU_COMPRESSION
nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
gops->cbc.init = NULL;
gops->cbc.ctrl = NULL;
gops->cbc.alloc_comptags = NULL;
}
#endif
#ifdef CONFIG_NVGPU_GRAPHICS
nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, false);
nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, true);

10
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
View File

@@ -1587,6 +1587,16 @@ int gv11b_init_hal(struct gk20a *g)
#endif
}
#ifdef CONFIG_NVGPU_COMPRESSION
nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
gops->cbc.init = NULL;
gops->cbc.ctrl = NULL;
gops->cbc.alloc_comptags = NULL;
}
#endif
nvgpu_set_enabled(g, NVGPU_PMU_FECS_BOOTSTRAP_DONE, false);
#ifdef CONFIG_NVGPU_FECS_TRACE
nvgpu_set_enabled(g, NVGPU_FECS_TRACE_VA, true);

14
drivers/gpu/nvgpu/hal/init/hal_tu104.c
View File

@@ -1780,16 +1780,22 @@ int tu104_init_hal(struct gk20a *g)
#ifdef CONFIG_NVGPU_DGPU
nvgpu_pramin_ops_init(g);
#endif
/* dGpu VDK support */
#ifdef CONFIG_NVGPU_SIM
if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)){
/* Disable compression */
#ifdef CONFIG_NVGPU_COMPRESSION
if (!nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
nvgpu_set_enabled(g, NVGPU_SUPPORT_COMPRESSION, true);
}
if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_COMPRESSION)) {
gops->cbc.init = NULL;
gops->cbc.ctrl = NULL;
gops->cbc.alloc_comptags = NULL;
}
#endif
/* dGpu VDK support */
#ifdef CONFIG_NVGPU_SIM
if (nvgpu_is_enabled(g, NVGPU_IS_FMODEL)) {
#ifdef CONFIG_NVGPU_GR_FALCON_NON_SECURE_BOOT
gops->gr.falcon.load_ctxsw_ucode =
nvgpu_gr_falcon_load_ctxsw_ucode;

5
drivers/gpu/nvgpu/include/nvgpu/enabled.h
View File

@@ -252,10 +252,13 @@ struct gk20a;
/** SM RAMS ECC is enabled */
#define NVGPU_ECC_ENABLED_SM_RAMS 86U
/** Enable compression */
#define NVGPU_SUPPORT_COMPRESSION 87U
/*
* Must be greater than the largest bit offset in the above list.
*/
#define NVGPU_MAX_ENABLED_BITS 87U
#define NVGPU_MAX_ENABLED_BITS 88U
/**
* @brief Check if the passed flag is enabled.

4
drivers/gpu/nvgpu/os/linux/ioctl_ctrl.c
View File

@@ -250,7 +250,9 @@ static struct nvgpu_flags_mapping flags_mapping[] = {
{NVGPU_GPU_FLAGS_SUPPORT_SET_CTX_MMU_DEBUG_MODE,
NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE},
{NVGPU_GPU_FLAGS_SUPPORT_FAULT_RECOVERY,
NVGPU_SUPPORT_FAULT_RECOVERY}
NVGPU_SUPPORT_FAULT_RECOVERY},
{NVGPU_GPU_FLAGS_SUPPORT_COMPRESSION,
NVGPU_SUPPORT_COMPRESSION}
};
static u64 nvgpu_ctrl_ioctl_gpu_characteristics_flags(struct gk20a *g)

2
include/uapi/linux/nvgpu.h
View File

@@ -173,6 +173,8 @@ struct nvgpu_gpu_zbc_query_table_args {
#define NVGPU_GPU_FLAGS_SUPPORT_SET_CTX_MMU_DEBUG_MODE (1ULL << 32)
/* Fault recovery is enabled */
#define NVGPU_GPU_FLAGS_SUPPORT_FAULT_RECOVERY (1ULL << 33)
/* Compression is enabled */
#define NVGPU_GPU_FLAGS_SUPPORT_COMPRESSION (1ULL << 34)
/* SM LRF ECC is enabled */
#define NVGPU_GPU_FLAGS_ECC_ENABLED_SM_LRF (1ULL << 60)
/* SM SHM ECC is enabled */