gpu: nvgpu: add pmu hals to resolve mismatch

Add the following HALs to avoid the duplication
of code for future chips:
- set_mailbox1
- get_ecc_address
- get_ecc_status
- set_ecc_status

JIRA NVGPU-9758

Change-Id: I54ce3dfaae2873dbcd88edabbd877eca9f3d1fdb
Signed-off-by: Divya <dsinghatwari@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2898016
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/hal/init/hal_ga100.c

@@ -1359,6 +1359,7 @@ static const struct gops_pmu ga100_ops_pmu = {
 	.pmu_get_queue_head = tu104_pmu_queue_head_r,
 	.pmu_mutex_release = gk20a_pmu_mutex_release,
 	.pmu_is_interrupted = gk20a_pmu_is_interrupted,
+	.set_mailbox1 = gk20a_pmu_set_mailbox1,
 	.get_irqstat = gk20a_pmu_get_irqstat,
 	.set_irqsclr = gk20a_pmu_set_irqsclr,
 	.set_irqsset = gk20a_pmu_set_irqsset,