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gpu: nvgpu: Restructure boardobjgrp unit

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This patch does the following for boardobjgrp unit.
1. Remove unused functions and its pointers.
2. Append public functions with nvgpu.
3. Remove unnecessary inclusion of header files.
4. Make local functions as static.
5. Fix 11.3 and 17.7 Misra violations.
6. Rename function names to increase readibility.
7. Remove boardobj* from static functions.

Jira NVGPU-1976
Jira NVGPU-1978

Change-Id: Ic262ddf6d913f3ad5002772265bafac0cb0e2d29
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2107169
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Abdul Salam
2019-04-26 12:33:41 +05:30
committed by mobile promotions
parent bc10ef568e
commit f17f6c95c2
8 changed files with 740 additions and 1122 deletions
Download Patch File Download Diff File Expand all files Collapse all files

99
drivers/gpu/nvgpu/common/boardobj/boardobj.c
View File

@@ -23,10 +23,59 @@
#include <nvgpu/kmem.h>
#include <nvgpu/gk20a.h>
#include <nvgpu/boardobj.h>
#include <nvgpu/pmu/pmuif/ctrlboardobj.h>
int boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj,
size_t size, void *args)
/*
* Destructor for the base board object. Called by each device-Specific
* implementation of the BOARDOBJ interface to destroy the board object.
* This has to be explicitly set by each device that extends from the
* board object.
*/
static int destruct_super(struct boardobj *pboardobj)
{
struct gk20a *g = pboardobj->g;
nvgpu_log_info(g, " ");
if (pboardobj == NULL) {
return -EINVAL;
}
nvgpu_list_del(&pboardobj->node);
if (pboardobj->allocated) {
nvgpu_kfree(pboardobj->g, pboardobj);
}
return 0;
}
/*
* check whether the specified BOARDOBJ object implements the queried
* type/class enumeration.
*/
static bool implements_super(struct gk20a *g, struct boardobj *pboardobj,
u8 type)
{
nvgpu_log_info(g, " ");
return (0U != (pboardobj->type_mask & BIT32(type)));
}
int nvgpu_boardobj_pmu_data_init_super(struct gk20a *g,
struct boardobj *pboardobj, struct nv_pmu_boardobj *pmudata)
{
nvgpu_log_info(g, " ");
if (pboardobj == NULL) {
return -EINVAL;
}
if (pmudata == NULL) {
return -EINVAL;
}
pmudata->type = pboardobj->type;
nvgpu_log_info(g, " Done");
return 0;
}
int nvgpu_boardobj_construct_super(struct gk20a *g, struct boardobj
**ppboardobj, size_t size, void *args)
{
struct boardobj *pboardobj = NULL;
struct boardobj *devtmp = (struct boardobj *)args;
@@ -51,51 +100,13 @@ int boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj,
pboardobj->idx = CTRL_BOARDOBJ_IDX_INVALID;
pboardobj->type_mask = BIT32(pboardobj->type) | devtmp->type_mask;
pboardobj->implements = boardobj_implements_super;
pboardobj->destruct = boardobj_destruct_super;
pboardobj->pmudatainit = boardobj_pmudatainit_super;
pboardobj->implements = implements_super;
pboardobj->destruct = destruct_super;
pboardobj->pmudatainit = nvgpu_boardobj_pmu_data_init_super;
nvgpu_list_add(&pboardobj->node, &g->boardobj_head);
return 0;
}
int boardobj_destruct_super(struct boardobj *pboardobj)
{
struct gk20a *g = pboardobj->g;
nvgpu_log_info(g, " ");
if (pboardobj == NULL) {
return -EINVAL;
}
nvgpu_list_del(&pboardobj->node);
if (pboardobj->allocated) {
nvgpu_kfree(pboardobj->g, pboardobj);
}
return 0;
}
bool boardobj_implements_super(struct gk20a *g, struct boardobj *pboardobj,
u8 type)
{
nvgpu_log_info(g, " ");
return (0U != (pboardobj->type_mask & BIT(type)));
}
int boardobj_pmudatainit_super(struct gk20a *g, struct boardobj *pboardobj,
struct nv_pmu_boardobj *pmudata)
{
nvgpu_log_info(g, " ");
if (pboardobj == NULL) {
return -EINVAL;
}
if (pmudata == NULL) {
return -EINVAL;
}
pmudata->type = pboardobj->type;
nvgpu_log_info(g, " Done");
return 0;
}

1355
drivers/gpu/nvgpu/common/boardobj/boardobjgrp.c
View File

File diff suppressed because it is too large Load Diff

75
drivers/gpu/nvgpu/common/boardobj/boardobjgrp_e255.c
View File

@@ -21,50 +21,15 @@
*/
#include <nvgpu/gk20a.h>
#include <nvgpu/boardobj.h>
#include <nvgpu/boardobjgrp_e255.h>
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/boardobjgrpmask.h>
#include <nvgpu/pmu/pmuif/ctrlboardobj.h>
int boardobjgrpconstruct_e255(struct gk20a *g,
struct boardobjgrp_e255 *pboardobjgrp_e255)
{
int status = 0;
u8 objslots;
nvgpu_log_info(g, " ");
objslots = 255;
status = boardobjgrpmask_e255_init(&pboardobjgrp_e255->mask, NULL);
if (status != 0) {
goto boardobjgrpconstruct_e255_exit;
}
pboardobjgrp_e255->super.type = CTRL_BOARDOBJGRP_TYPE_E255;
pboardobjgrp_e255->super.ppobjects = pboardobjgrp_e255->objects;
pboardobjgrp_e255->super.objslots = objslots;
pboardobjgrp_e255->super.mask = &(pboardobjgrp_e255->mask.super);
status = boardobjgrp_construct_super(g, &pboardobjgrp_e255->super);
if (status != 0) {
goto boardobjgrpconstruct_e255_exit;
}
pboardobjgrp_e255->super.pmuhdrdatainit =
boardobjgrp_pmuhdrdatainit_e255;
boardobjgrpconstruct_e255_exit:
return status;
}
int boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g,
static int boardobjgrp_pmu_hdr_data_init_e255(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu,
struct boardobjgrpmask *mask)
{
struct nv_pmu_boardobjgrp_e255 *pgrpe255 =
(struct nv_pmu_boardobjgrp_e255 *)pboardobjgrppmu;
(struct nv_pmu_boardobjgrp_e255 *)(void *)pboardobjgrppmu;
int status;
nvgpu_log_info(g, " ");
@@ -77,7 +42,7 @@ int boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g,
return -EINVAL;
}
status = boardobjgrpmask_export(mask,
status = nvgpu_boardobjgrpmask_export(mask,
mask->bitcount,
&pgrpe255->obj_mask.super);
if (status != 0) {
@@ -85,6 +50,38 @@ int boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g,
return status;
}
return boardobjgrp_pmuhdrdatainit_super(g,
return nvgpu_boardobjgrp_pmu_hdr_data_init_super(g,
pboardobjgrp, pboardobjgrppmu, mask);
}
int nvgpu_boardobjgrp_construct_e255(struct gk20a *g,
struct boardobjgrp_e255 *pboardobjgrp_e255)
{
int status = 0;
u8 objslots;
nvgpu_log_info(g, " ");
objslots = 255;
status = boardobjgrpmask_e255_init(&pboardobjgrp_e255->mask, NULL);
if (status != 0) {
goto nvgpu_boardobjgrpconstruct_e255_exit;
}
pboardobjgrp_e255->super.type = CTRL_BOARDOBJGRP_TYPE_E255;
pboardobjgrp_e255->super.ppobjects = pboardobjgrp_e255->objects;
pboardobjgrp_e255->super.objslots = objslots;
pboardobjgrp_e255->super.mask = &(pboardobjgrp_e255->mask.super);
status = nvgpu_boardobjgrp_construct_super(g, &pboardobjgrp_e255->super);
if (status != 0) {
goto nvgpu_boardobjgrpconstruct_e255_exit;
}
pboardobjgrp_e255->super.pmuhdrdatainit =
boardobjgrp_pmu_hdr_data_init_e255;
nvgpu_boardobjgrpconstruct_e255_exit:
return status;
}

74
drivers/gpu/nvgpu/common/boardobj/boardobjgrp_e32.c
View File

@@ -20,49 +20,15 @@
* DEALINGS IN THE SOFTWARE.
*/
#include <nvgpu/gk20a.h>
#include <nvgpu/boardobj.h>
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/boardobjgrp_e32.h>
#include <nvgpu/boardobjgrpmask.h>
#include <nvgpu/pmu/pmuif/ctrlboardobj.h>
int boardobjgrpconstruct_e32(struct gk20a *g,
struct boardobjgrp_e32 *pboardobjgrp_e32)
{
int status;
u8 objslots;
nvgpu_log_info(g, " ");
objslots = 32;
status = boardobjgrpmask_e32_init(&pboardobjgrp_e32->mask, NULL);
if (status != 0) {
goto boardobjgrpconstruct_e32_exit;
}
pboardobjgrp_e32->super.type = CTRL_BOARDOBJGRP_TYPE_E32;
pboardobjgrp_e32->super.ppobjects = pboardobjgrp_e32->objects;
pboardobjgrp_e32->super.objslots = objslots;
pboardobjgrp_e32->super.mask = &(pboardobjgrp_e32->mask.super);
status = boardobjgrp_construct_super(g, &pboardobjgrp_e32->super);
if (status != 0) {
goto boardobjgrpconstruct_e32_exit;
}
pboardobjgrp_e32->super.pmuhdrdatainit = boardobjgrp_pmuhdrdatainit_e32;
boardobjgrpconstruct_e32_exit:
return status;
}
int boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g,
static int boardobjgrp_pmu_hdr_data_init_e32(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu,
struct boardobjgrpmask *mask)
{
struct nv_pmu_boardobjgrp_e32 *pgrpe32 =
(struct nv_pmu_boardobjgrp_e32 *)pboardobjgrppmu;
(struct nv_pmu_boardobjgrp_e32 *)(void *)pboardobjgrppmu;
int status;
nvgpu_log_info(g, " ");
@@ -74,7 +40,7 @@ int boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g,
if (pboardobjgrppmu == NULL) {
return -EINVAL;
}
status = boardobjgrpmask_export(mask,
status = nvgpu_boardobjgrpmask_export(mask,
mask->bitcount,
&pgrpe32->obj_mask.super);
if (status != 0) {
@@ -82,6 +48,38 @@ int boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g,
return status;
}
return boardobjgrp_pmuhdrdatainit_super(g,
return nvgpu_boardobjgrp_pmu_hdr_data_init_super(g,
pboardobjgrp, pboardobjgrppmu, mask);
}
int nvgpu_boardobjgrp_construct_e32(struct gk20a *g,
struct boardobjgrp_e32 *pboardobjgrp_e32)
{
int status;
u8 objslots;
nvgpu_log_info(g, " ");
objslots = 32;
status = boardobjgrpmask_e32_init(&pboardobjgrp_e32->mask, NULL);
if (status != 0) {
goto nvgpu_boardobjgrpconstruct_e32_exit;
}
pboardobjgrp_e32->super.type = CTRL_BOARDOBJGRP_TYPE_E32;
pboardobjgrp_e32->super.ppobjects = pboardobjgrp_e32->objects;
pboardobjgrp_e32->super.objslots = objslots;
pboardobjgrp_e32->super.mask = &(pboardobjgrp_e32->mask.super);
status = nvgpu_boardobjgrp_construct_super(g, &pboardobjgrp_e32->super);
if (status != 0) {
goto nvgpu_boardobjgrpconstruct_e32_exit;
}
pboardobjgrp_e32->super.pmuhdrdatainit =
boardobjgrp_pmu_hdr_data_init_e32;
nvgpu_boardobjgrpconstruct_e32_exit:
return status;
}

85
drivers/gpu/nvgpu/include/nvgpu/boardobj.h
View File

@@ -30,35 +30,20 @@ struct boardobj;
struct nvgpu_list_node;
struct gk20a;
/*
* check whether the specified BOARDOBJ object implements the queried
* type/class enumeration.
*/
bool boardobj_implements_super(struct gk20a *g, struct boardobj *pboardobj,
u8 type);
/*
* Fills out the appropriate the nv_pmu_xxxx_device_desc_<xyz> driver->PMU
* description structure, describing this BOARDOBJ board device to the PMU.
*
*/
int boardobj_pmudatainit_super(struct gk20a *g, struct boardobj *pboardobj,
struct nv_pmu_boardobj *pmudata);
int nvgpu_boardobj_pmu_data_init_super(struct gk20a *g, struct boardobj
*pboardobj, struct nv_pmu_boardobj *pmudata);
/*
* Constructor for the base Board Object. Called by each device-specific
* implementation of the BOARDOBJ interface to initialize the board object.
*/
int boardobj_construct_super(struct gk20a *g, struct boardobj **ppboardobj,
size_t size, void *args);
/*
* Destructor for the base board object. Called by each device-Specific
* implementation of the BOARDOBJ interface to destroy the board object.
* This has to be explicitly set by each device that extends from the
* board object.
*/
int boardobj_destruct_super(struct boardobj *pboardobj);
int nvgpu_boardobj_construct_super(struct gk20a *g, struct boardobj
**ppboardobj, size_t size, void *args);
/*
* Base Class for all physical or logical device on the PCB.
@@ -87,9 +72,71 @@ struct boardobj {
struct nvgpu_list_node node;
};
struct boardobjgrp_pmucmdhandler_params {
/* Pointer to the BOARDOBJGRP associated with this CMD */
struct boardobjgrp *pboardobjgrp;
/* Pointer to structure representing this NV_PMU_BOARDOBJ_CMD_GRP */
struct boardobjgrp_pmu_cmd *pcmd;
/* Boolean indicating whether the PMU successfully handled the CMD */
u32 success;
};
#define BOARDOBJ_GET_TYPE(pobj) (((struct boardobj *)(pobj))->type)
#define BOARDOBJ_GET_IDX(pobj) (((struct boardobj *)(pobj))->idx)
#define HIGHESTBITIDX_32(n32) \
{ \
u32 count = 0U; \
while (((n32) >>= 1U) != 0U) { \
count++; \
} \
(n32) = count; \
}
#define LOWESTBIT(x) ((x) & (((x)-1U) ^ (x)))
#define HIGHESTBIT(n32) \
{ \
HIGHESTBITIDX_32(n32); \
n32 = NVBIT(n32); \
}
#define ONEBITSET(x) ((x) && (((x) & ((x)-1U)) == 0U))
#define LOWESTBITIDX_32(n32) \
{ \
n32 = LOWESTBIT(n32); \
IDX_32(n32); \
}
#define NUMSETBITS_32(n32) \
{ \
(n32) = (n32) - (((n32) >> 1U) & 0x55555555U); \
(n32) = ((n32) & 0x33333333U) + (((n32) >> 2U) & 0x33333333U); \
(n32) = ((((n32) + ((n32) >> 4U)) & 0x0F0F0F0FU) * 0x01010101U) >> 24U;\
}
#define IDX_32(n32) \
{ \
u32 idx = 0U; \
if (((n32) & 0xFFFF0000U) != 0U) { \
idx += 16U; \
} \
if (((n32) & 0xFF00FF00U) != 0U) { \
idx += 8U; \
} \
if (((n32) & 0xF0F0F0F0U) != 0U) { \
idx += 4U; \
} \
if (((n32) & 0xCCCCCCCCU) != 0U) { \
idx += 2U; \
} \
if (((n32) & 0xAAAAAAAAU) != 0U) { \
idx += 1U; \
} \
(n32) = idx; \
}
static inline struct boardobj *
boardobj_from_node(struct nvgpu_list_node *node)
{

147
drivers/gpu/nvgpu/include/nvgpu/boardobjgrp.h
View File

@@ -34,13 +34,6 @@ struct nvgpu_list_node;
#include <nvgpu/pmu.h>
#include <nvgpu/pmu/super_surface.h>
/*
* Board Object Group destructor.
*
*/
int boardobjgrp_destruct_super(struct boardobjgrp *pboardobjgrp);
int boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp);
/*
* Board Object Group Remover and destructor. This is used to remove and
* destruct specific entry from the Board Object Group.
@@ -48,19 +41,11 @@ int boardobjgrp_destruct_impl(struct boardobjgrp *pboardobjgrp);
int boardobjgrp_objremoveanddestroy(struct boardobjgrp *pboardobjgrp,
u8 index);
/*
* BOARDOBJGRP handler for PMU_UNIT_INIT. Calls the PMU_UNIT_INIT handlers
* for the constructed PMU CMDs, and then sets the object via the
* PMU_BOARDOBJ_CMD_GRP interface (if constructed).
*/
int boardobjgrp_pmuinithandle_impl(struct gk20a *g,
struct boardobjgrp *pboardobjgrp);
/*
* Fills out the appropriate the PMU_BOARDOBJGRP_<xyz> driver<->PMU description
* header structure, more specifically a mask of BOARDOBJs.
*/
int boardobjgrp_pmuhdrdatainit_super(struct gk20a *g,
int nvgpu_boardobjgrp_pmu_hdr_data_init_super(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu,
struct boardobjgrpmask *mask);
@@ -69,34 +54,13 @@ int boardobjgrp_pmuhdrdatainit_super(struct gk20a *g,
* Fills out the appropriate the PMU_BOARDOBJGRP_<xyz> driver->PMU description
* structure, describing the BOARDOBJGRP and all of its BOARDOBJs to the PMU.
*/
int boardobjgrp_pmudatainit_super(struct gk20a *g,
int nvgpu_boardobjgrp_pmu_data_init_super(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu);
int boardobjgrp_pmudatainit_legacy(struct gk20a *g,
int nvgpu_boardobjgrp_pmu_data_init_legacy(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu);
/*
* Sends a BOARDOBJGRP to the PMU via the PMU_BOARDOBJ_CMD_GRP interface.
* This interface leverages @ref boardobjgrp_pmudatainit to populate the
* structure.
*/
int boardobjgrp_pmuset_impl(struct gk20a *g,
struct boardobjgrp *pboardobjgrp);
int boardobjgrp_pmuset_impl_v1(struct gk20a *g,
struct boardobjgrp *pboardobjgrp);
/*
* Gets the dynamic status of the PMU BOARDOBJGRP via the
* PMU_BOARDOBJ_CMD_GRP GET_STATUS interface.
*/
int boardobjgrp_pmugetstatus_impl(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrpmask *mask);
int boardobjgrp_pmugetstatus_impl_v1(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrpmask *mask);
/*
* Structure describing an PMU CMD for interacting with the representaition
* of this BOARDOBJGRP within the PMU.
@@ -137,32 +101,12 @@ struct boardobjgrp_pmu {
* CMD. This provides the various information describing the PMU CMD including
* the CMD and MSG ID and the size of the various sturctures in the payload.
*/
int boardobjgrp_pmucmd_construct_impl(struct gk20a *g,
int nvgpu_boardobjgrp_pmucmd_construct_impl(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrp_pmu_cmd *cmd, u8 id,
u8 msgid, u16 hdrsize, u16 entrysize,
u16 fbsize, u32 ss_offset, u8 rpc_func_id);
int boardobjgrp_pmucmd_construct_impl_v1(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrp_pmu_cmd *cmd, u8 id,
u8 msgid, u16 hdrsize, u16 entrysize,
u16 fbsize, u32 ss_offset, u8 rpc_func_id);
/*
* Destroys BOARDOBJGRP PMU SW state. CMD.
*/
int boardobjgrp_pmucmd_destroy_impl(struct gk20a *g,
struct boardobjgrp_pmu_cmd *cmd);
/*
* init handler for the BOARDOBJGRP PMU CMD. Allocates and maps the
* PMU CMD payload within both the PMU and driver so that it can be referenced
* at run-time.
*/
int boardobjgrp_pmucmd_pmuinithandle_impl(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrp_pmu_cmd *pcmd);
u32 fbsize, u32 ss_offset, u8 rpc_func_id);
/*
* Base Class Group for all physical or logical device on the PCB.
@@ -332,14 +276,16 @@ do { \
#define BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp, eng, ENG, \
class, CLASS) \
((g)->pmu.fw.ops.boardobj.boardobjgrp_pmucmd_construct_impl( \
(nvgpu_boardobjgrp_pmucmd_construct_impl( \
g, /* pgpu */ \
pboardobjgrp, /* pboardobjgrp */ \
&((pboardobjgrp)->pmu.set), /* pcmd */ \
NV_PMU_##ENG##_CMD_ID_BOARDOBJ_GRP_SET, /* id */ \
NV_PMU_##ENG##_MSG_ID_BOARDOBJ_GRP_SET, /* msgid */ \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobjgrp_set_header_aligned), \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobj_set_union_aligned), \
(u32)sizeof(union nv_pmu_##eng##_##class## \
_boardobjgrp_set_header_aligned), \
(u32)sizeof(union nv_pmu_##eng##_##class## \
_boardobj_set_union_aligned), \
(u32)nvgpu_pmu_get_ss_member_set_size(g, &g->pmu, \
NV_PMU_SUPER_SURFACE_MEMBER_##CLASS##_GRP), \
(u32)nvgpu_pmu_get_ss_member_set_offset(g, &g->pmu, \
@@ -348,14 +294,16 @@ do { \
#define BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g, pboardobjgrp, \
eng, ENG, class, CLASS) \
((g)->pmu.fw.ops.boardobj.boardobjgrp_pmucmd_construct_impl( \
(nvgpu_boardobjgrp_pmucmd_construct_impl( \
g, /* pGpu */ \
pboardobjgrp, /* pBoardObjGrp */ \
&((pboardobjgrp)->pmu.getstatus), /* pCmd */ \
NV_PMU_##ENG##_CMD_ID_BOARDOBJ_GRP_GET_STATUS, /* id */ \
NV_PMU_##ENG##_MSG_ID_BOARDOBJ_GRP_GET_STATUS, /* msgid */ \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobjgrp_get_status_header_aligned), \
(u32)sizeof(union nv_pmu_##eng##_##class##_boardobj_get_status_union_aligned), \
(u32)sizeof(union nv_pmu_##eng##_##class## \
_boardobjgrp_get_status_header_aligned), \
(u32)sizeof(union nv_pmu_##eng##_##class## \
_boardobj_get_status_union_aligned), \
(u32)nvgpu_pmu_get_ss_member_get_status_size(g, &g->pmu, \
NV_PMU_SUPER_SURFACE_MEMBER_##CLASS##_GRP), \
(u32)nvgpu_pmu_get_ss_member_get_status_offset(g, &g->pmu, \
@@ -364,63 +312,10 @@ do { \
/* ------------------------ Function Prototypes ----------------------------- */
/* Constructor and destructor */
int boardobjgrp_construct_super(struct gk20a *g,
int nvgpu_boardobjgrp_construct_super(struct gk20a *g,
struct boardobjgrp *pboardobjgrp);
void boardobjgrpe32hdrset(struct nv_pmu_boardobjgrp *hdr, u32 objmask);
#define HIGHESTBITIDX_32(n32) \
{ \
u32 count = 0U; \
while (((n32) >>= 1U) != 0U) { \
count++; \
} \
(n32) = count; \
}
#define LOWESTBIT(x) ((x) & (((x)-1U) ^ (x)))
#define HIGHESTBIT(n32) \
{ \
HIGHESTBITIDX_32(n32); \
n32 = NVBIT(n32); \
}
#define ONEBITSET(x) ((x) && (((x) & ((x)-1U)) == 0U))
#define LOWESTBITIDX_32(n32) \
{ \
n32 = LOWESTBIT(n32); \
IDX_32(n32); \
}
#define NUMSETBITS_32(n32) \
{ \
(n32) = (n32) - (((n32) >> 1U) & 0x55555555U); \
(n32) = ((n32) & 0x33333333U) + (((n32) >> 2U) & 0x33333333U); \
(n32) = ((((n32) + ((n32) >> 4U)) & 0x0F0F0F0FU) * 0x01010101U) >> 24U;\
}
#define IDX_32(n32) \
{ \
u32 idx = 0U; \
if (((n32) & 0xFFFF0000U) != 0U) { \
idx += 16U; \
} \
if (((n32) & 0xFF00FF00U) != 0U) { \
idx += 8U; \
} \
if (((n32) & 0xF0F0F0F0U) != 0U) { \
idx += 4U; \
} \
if (((n32) & 0xCCCCCCCCU) != 0U) { \
idx += 2U; \
} \
if (((n32) & 0xAAAAAAAAU) != 0U) { \
idx += 1U; \
} \
(n32) = idx; \
}
void nvgpu_boardobjgrp_e32_hdr_set(struct nv_pmu_boardobjgrp *hdr, u32 objmask);
static inline struct boardobjgrp *
boardobjgrp_from_node(struct nvgpu_list_node *node)
@@ -429,10 +324,4 @@ boardobjgrp_from_node(struct nvgpu_list_node *node)
((uintptr_t)node - offsetof(struct boardobjgrp, node));
};
int is_boardobjgrp_pmucmd_id_valid_v0(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrp_pmu_cmd *pcmd);
int is_boardobjgrp_pmucmd_id_valid_v1(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct boardobjgrp_pmu_cmd *cmd);
#endif /* NVGPU_BOARDOBJGRP_H */

14
drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e255.h
View File

@@ -23,7 +23,6 @@
#ifndef NVGPU_BOARDOBJGRP_E255_H
#define NVGPU_BOARDOBJGRP_E255_H
#include <nvgpu/boardobj.h>
#include <nvgpu/boardobjgrpmask.h>
#include <nvgpu/boardobjgrp.h>
@@ -38,16 +37,13 @@ struct boardobjgrp_e255 {
struct boardobjgrpmask_e255 mask;
};
#define boardobjgrp_pmudatainit_e255(g, pboardpbjgrp, pboardobjgrppmu) \
boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu)
#define boardobjgrp_pmu_data_init_e255(g, pboardpbjgrp, pboardobjgrppmu) \
nvgpu_boardobjgrp_pmu_data_init_super(g, \
pboardpbjgrp, pboardobjgrppmu)
/* Constructor and destructor */
int boardobjgrpconstruct_e255(struct gk20a *g,
int nvgpu_boardobjgrp_construct_e255(struct gk20a *g,
struct boardobjgrp_e255 *pboardobjgrp_e255);
int boardobjgrpdestruct_e255(struct boardobjgrp *pboardobjgrp);
int boardobjgrp_pmuhdrdatainit_e255(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu,
struct boardobjgrpmask *mask);
int boardobjgrp_destruct_e255(struct boardobjgrp *pboardobjgrp);
#endif /* NVGPU_BOARDOBJGRP_E255_H */

13
drivers/gpu/nvgpu/include/nvgpu/boardobjgrp_e32.h
View File

@@ -23,7 +23,6 @@
#ifndef NVGPU_BOARDOBJGRP_E32_H
#define NVGPU_BOARDOBJGRP_E32_H
#include <nvgpu/boardobj.h>
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/boardobjgrpmask.h>
@@ -53,15 +52,11 @@ struct boardobjgrp_e32 {
* implement this interface.
*/
#define boardobjgrp_pmudatainit_e32(g, pboardpbjgrp, pboardobjgrppmu) \
boardobjgrp_pmudatainit_super(g, pboardpbjgrp, pboardobjgrppmu)
nvgpu_boardobjgrp_pmu_data_init_super(g, pboardpbjgrp, \
pboardobjgrppmu)
/* Constructor and destructor */
int boardobjgrpconstruct_e32(struct gk20a *g,
int nvgpu_boardobjgrp_construct_e32(struct gk20a *g,
struct boardobjgrp_e32 *pboardobjgrp_e32);
int boardobjgrpdestruct_e32(struct boardobjgrp *pboardobjgrp);
int boardobjgrp_pmuhdrdatainit_e32(struct gk20a *g,
struct boardobjgrp *pboardobjgrp,
struct nv_pmu_boardobjgrp_super *pboardobjgrppmu,
struct boardobjgrpmask *mask);
int boardobjgrp_destruct_e32(struct boardobjgrp *pboardobjgrp);
#endif /* NVGPU_BOARDOBJGRP_E32_H */