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gpu: nvgpu: gp10b: Update regops whitelist
Update regops whitelist with two new registers. Bug 1734151 Change-Id: Id09bdfb1733620bb75d4558299c5e9c7f66bb00b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1029772 GVS: Gerrit_Virtual_Submit Reviewed-by: Richard Zhao <rizhao@nvidia.com>
This commit is contained in:
committed by
Deepak Nibade
parent
57a75c3ba6
commit
f2bb4f10ce
@@ -69,6 +69,7 @@ static const struct regop_offset_range gp10b_global_whitelist_ranges[] = {
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{ 0x00142480, 1},
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{ 0x001424a0, 1},
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{ 0x00142550, 1},
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{ 0x0017e028, 1},
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{ 0x0017e280, 1},
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{ 0x0017e294, 1},
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{ 0x0017e29c, 2},
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@@ -138,7 +139,7 @@ static const struct regop_offset_range gp10b_global_whitelist_ranges[] = {
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{ 0x001b4094, 3},
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{ 0x001b40a4, 1},
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{ 0x001b4100, 6},
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{ 0x001b4124, 1},
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{ 0x001b4124, 2},
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{ 0x001b8000, 1},
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{ 0x001b8008, 1},
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{ 0x001b8010, 3},
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@@ -371,6 +372,7 @@ static const struct regop_offset_range gp10b_global_whitelist_ranges[] = {
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{ 0x00900100, 1},
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{ 0x009a0100, 1},
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};
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static const u32 gp10b_global_whitelist_ranges_count =
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ARRAY_SIZE(gp10b_global_whitelist_ranges);
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