gpu: nvgpu: fix int declaration

variable g->gr.ctx_vars.regs_base_index is declared as "int", but it is assigned
value from unsigned int pointer
Since we expect it to be unsigned at all the places, declare it as "u32" instead
of "int"

Jira NVGPU-449

Change-Id: I2a5b35698c655fa0caa3e38e37ed4d84569c996a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1612446
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Deepak Nibade
2017-12-06 05:24:27 -08:00
committed by mobile promotions
parent ac78f5d95e
commit f3dcf5f534
2 changed files with 2 additions and 2 deletions

View File

@@ -241,7 +241,7 @@ static int gr_gk20a_init_ctx_vars_fw(struct gk20a *g, struct gr_gk20a *gr)
break;
case NETLIST_REGIONID_CTXSW_REG_BASE_INDEX:
g->gr.ctx_vars.regs_base_index = *src;
gk20a_dbg_info("NETLIST_REGIONID_CTXSW_REG_BASE_INDEX : %d",
gk20a_dbg_info("NETLIST_REGIONID_CTXSW_REG_BASE_INDEX : %u",
g->gr.ctx_vars.regs_base_index);
break;
case NETLIST_REGIONID_MAJORV:

View File

@@ -311,7 +311,7 @@ struct gr_gk20a {
struct aiv_list_gk20a pm_ucgpc;
struct aiv_list_gk20a etpc;
} ctxsw_regs;
int regs_base_index;
u32 regs_base_index;
bool valid;
u32 preempt_image_size;