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gpu: nvgpu: fifo MISRA fix for Rule 15.7

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Add terminating else statement

JIRA NVGPU-3383

Change-Id: I3ceb15de502d3927452713765a83076837904624
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2115899
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Seema Khowala
2019-05-09 12:58:44 -07:00
committed by mobile promotions
parent 50d4421dc2
commit f453f66fc4
2 changed files with 13 additions and 2 deletions
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11
drivers/gpu/nvgpu/hal/fifo/ctxsw_timeout_gv11b.c
View File

@@ -114,6 +114,9 @@ static u32 gv11b_fifo_ctxsw_timeout_info(struct gk20a *g, u32 active_eng_id,
fifo_intr_ctxsw_timeout_info_ctxsw_state_save_v()) {
tsgid = fifo_intr_ctxsw_timeout_info_prev_tsgid_v(timeout_info);
} else {
nvgpu_log_info(g, "ctxsw_timeout_info_ctxsw_state: 0x%08x",
ctx_status);
}
nvgpu_log_info(g, "ctxsw timeout info: tsgid = %d", tsgid);
@@ -156,18 +159,22 @@ static u32 gv11b_fifo_ctxsw_timeout_info(struct gk20a *g, u32 active_eng_id,
if (*info_status ==
fifo_intr_ctxsw_timeout_info_status_ack_received_v()) {
nvgpu_log_info(g, "ctxsw timeout info : ack received");
nvgpu_log_info(g, "ctxsw timeout info: ack received");
/* no need to recover */
tsgid = NVGPU_INVALID_TSG_ID;
} else if (*info_status ==
fifo_intr_ctxsw_timeout_info_status_dropped_timeout_v()) {
nvgpu_log_info(g, "ctxsw timeout info : dropped timeout");
nvgpu_log_info(g, "ctxsw timeout info: dropped timeout");
/* no need to recover */
tsgid = NVGPU_INVALID_TSG_ID;
} else {
nvgpu_log_info(g, "ctxsw timeout info status: 0x%08x",
*info_status);
}
return tsgid;
}

4
drivers/gpu/nvgpu/hal/fifo/mmu_fault_gk20a.c
View File

@@ -158,6 +158,8 @@ static void gk20a_fifo_parse_mmu_fault_info(struct gk20a *g, u32 mmu_fault_id,
fifo_intr_mmu_fault_info_engine_subid_gpc_v())
&& (g->ops.fifo.get_mmu_fault_gpc_desc != NULL)) {
g->ops.fifo.get_mmu_fault_gpc_desc(mmufault);
} else {
mmufault->client_id_desc = does_not_exist[0];
}
}
@@ -320,6 +322,8 @@ bool gk20a_fifo_handle_mmu_fault_locked(
if (refch != NULL) {
tsg = tsg_gk20a_from_ch(refch);
}
} else {
nvgpu_err(g, "ctx_id_type is not chid/tsgid");
}
} else {
/* Look up channel from the inst block pointer. */