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gpu: nvgpu: update HAL function name

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get_ecc_override_val is renamed to gp10b_gr_get_ecc_override_val to
follow the naming convention of the HAL functions correctly.

Change-Id: I80e495e8bec3483651e325b792708382e5327de0
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2357925
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Debarshi Dutta
2020-06-09 16:34:03 +05:30
committed by Alex Waterman
parent 4dcfbc19de
commit f6298157bc
5 changed files with 5 additions and 5 deletions
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2
drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.c
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@@ -613,7 +613,7 @@ u32 gp10b_gr_get_sm_hww_warp_esr(struct gk20a *g,
return hww_warp_esr;
}
u32 get_ecc_override_val(struct gk20a *g)
u32 gp10b_gr_get_ecc_override_val(struct gk20a *g)
{
bool en = false;

2
drivers/gpu/nvgpu/hal/gr/gr/gr_gp10b.h
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@@ -55,7 +55,7 @@ int gr_gp10b_pre_process_sm_exception(struct gk20a *g,
bool *early_exit, bool *ignore_debugger);
u32 gp10b_gr_get_sm_hww_warp_esr(struct gk20a *g,
u32 gpc, u32 tpc, u32 sm);
u32 get_ecc_override_val(struct gk20a *g);
u32 gp10b_gr_get_ecc_override_val(struct gk20a *g);
int gr_gp10b_suspend_contexts(struct gk20a *g,
struct dbg_session_gk20a *dbg_s,
int *ctx_resident_ch_fd);

2
drivers/gpu/nvgpu/hal/init/hal_gp10b.c
View File

@@ -257,7 +257,7 @@ static const struct gpu_ops gp10b_ops = {
.init_cyclestats = gr_gm20b_init_cyclestats,
.set_sm_debug_mode = gr_gk20a_set_sm_debug_mode,
.bpt_reg_info = gr_gm20b_bpt_reg_info,
.get_lrf_tex_ltc_dram_override = get_ecc_override_val,
.get_lrf_tex_ltc_dram_override = gp10b_gr_get_ecc_override_val,
.update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode,
.update_hwpm_ctxsw_mode = gr_gk20a_update_hwpm_ctxsw_mode,
.set_mmu_debug_mode = NULL,

2
drivers/gpu/nvgpu/hal/init/hal_gv11b.c
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@@ -324,7 +324,7 @@ NVGPU_COV_WHITELIST_BLOCK_END(NVGPU_MISRA(Rule, 8_7))
.init_cyclestats = gr_gm20b_init_cyclestats,
.set_sm_debug_mode = gv11b_gr_set_sm_debug_mode,
.bpt_reg_info = gv11b_gr_bpt_reg_info,
.get_lrf_tex_ltc_dram_override = get_ecc_override_val,
.get_lrf_tex_ltc_dram_override = gp10b_gr_get_ecc_override_val,
.update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode,
.get_num_hwpm_perfmon = gr_gv100_get_num_hwpm_perfmon,
.set_pmm_register = gr_gv100_set_pmm_register,

2
drivers/gpu/nvgpu/hal/init/hal_tu104.c
View File

@@ -364,7 +364,7 @@ static const struct gpu_ops tu104_ops = {
.init_cyclestats = gr_gm20b_init_cyclestats,
.set_sm_debug_mode = gv11b_gr_set_sm_debug_mode,
.bpt_reg_info = gv11b_gr_bpt_reg_info,
.get_lrf_tex_ltc_dram_override = get_ecc_override_val,
.get_lrf_tex_ltc_dram_override = gp10b_gr_get_ecc_override_val,
.update_smpc_ctxsw_mode = gr_gk20a_update_smpc_ctxsw_mode,
.get_num_hwpm_perfmon = gr_gv100_get_num_hwpm_perfmon,
.set_pmm_register = gr_gv100_set_pmm_register,