gpu: nvgpu: Bypass for GM20B post-divider change

Switch GM20b GPCPLL under bypass when changing post-divider setting
(for now, don't assume that post-divider is glitch-less).

Change-Id: I62b1285c035de0913207a86c41f37b7765da3893
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/495300
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bo Yan <byan@nvidia.com>

drivers/gpu/nvgpu/gm20b/clk_gm20b.c

@@ -78,7 +78,7 @@ static inline u32 div_to_pl(u32 div)
 }
 
 /* FIXME: remove after on-silicon testing */
-#define PLDIV_GLITCHLESS 1
+#define PLDIV_GLITCHLESS 0
 
 /* Calculate and update M/N/PL as well as pll->freq
     ref_clk_f = clk_in_f;