gpu: nvgpu: clean MISRA 17.7 in pd_cache.c

MISRA Rule-17.7 requires the return value of all functions to be used.
Fix is either to use the return value or change the function to return
void. This patch contains fixes for all 17.7 violations in pd_cache.c

JIRA NVGPU-677.

Change-Id: Idd5534ce82107071a1d47250f87e6a1046989433
Signed-off-by: Nicolas Benech <nbenech@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1964639
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
This commit is contained in:
Nicolas Benech
2018-12-03 16:56:46 -05:00
committed by mobile promotions
parent 904cd50026
commit f80d2a01f4

View File

@@ -213,8 +213,8 @@ void nvgpu_pd_cache_fini(struct gk20a *g)
}
for (i = 0U; i < NVGPU_PD_CACHE_COUNT; i++) {
WARN_ON(!nvgpu_list_empty(&cache->full[i]));
WARN_ON(!nvgpu_list_empty(&cache->partial[i]));
(void) WARN_ON(!nvgpu_list_empty(&cache->full[i]));
(void) WARN_ON(!nvgpu_list_empty(&cache->partial[i]));
}
nvgpu_kfree(g, g->mm.pd_cache);