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gpu: nvgpu: remove nvgpu_next files
Remove all nvgpu_next files and move the code into corresponding nvgpu files. Merge nvgpu-next-*.yaml into nvgpu-.yaml files. Jira NVGPU-4771 Change-Id: I595311be3c7bbb4f6314811e68712ff01763801e Signed-off-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2547557 Reviewed-by: svc_kernel_abi <svc_kernel_abi@nvidia.com> Reviewed-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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Antony Clince Alex
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@@ -39,12 +39,6 @@
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#include "ioctl_tsg.h"
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#include "ioctl.h"
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/** @cond DOXYGEN_SHOULD_SKIP_THIS */
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#if defined(CONFIG_NVGPU_NON_FUSA)
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#include "os/linux/nvgpu_next_ioctl_prof.h"
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#endif
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/** @endcond DOXYGEN_SHOULD_SKIP_THIS */
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#include <nvgpu/gr/gr_utils.h>
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#include <nvgpu/gr/gr_instances.h>
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#include <nvgpu/grmgr.h>
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@@ -762,6 +756,78 @@ static int nvgpu_prof_ioctl_pma_stream_update_get_put(struct nvgpu_profiler_obje
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return 0;
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}
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#if defined(CONFIG_NVGPU_HAL_NON_FUSA)
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static u32 nvgpu_prof_vab_reserve_translate_vab_mode(struct gk20a *g, u32 mode)
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{
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u32 vab_mode = 0U;
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if (mode == NVGPU_PROFILER_VAB_RANGE_CHECKER_MODE_ACCESS) {
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vab_mode = NVGPU_VAB_MODE_ACCESS;
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} else if (mode == NVGPU_PROFILER_VAB_RANGE_CHECKER_MODE_DIRTY) {
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vab_mode = NVGPU_VAB_MODE_DIRTY;
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} else {
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nvgpu_err(g, "Unknown vab mode: 0x%x", mode);
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}
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return vab_mode;
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}
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static int nvgpu_prof_ioctl_vab_reserve(struct nvgpu_profiler_object *prof,
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struct nvgpu_profiler_vab_reserve_args *arg)
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{
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struct gk20a *g = prof->g;
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int err;
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u32 vab_mode = nvgpu_prof_vab_reserve_translate_vab_mode(g,
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(u32)arg->vab_mode);
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struct nvgpu_profiler_vab_range_checker *user_ckr =
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(struct nvgpu_profiler_vab_range_checker *)(uintptr_t)
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arg->range_checkers_ptr;
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struct nvgpu_vab_range_checker *ckr;
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if (arg->num_range_checkers == 0) {
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nvgpu_err(g, "Range checkers cannot be zero");
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return -EINVAL;
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}
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ckr = nvgpu_kzalloc(g, sizeof(struct nvgpu_vab_range_checker) *
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arg->num_range_checkers);
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if (copy_from_user(ckr, user_ckr,
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sizeof(struct nvgpu_vab_range_checker) *
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arg->num_range_checkers)) {
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return -EFAULT;
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}
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err = g->ops.fb.vab.reserve(g, vab_mode, arg->num_range_checkers, ckr);
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nvgpu_kfree(g, ckr);
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return err;
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}
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static int nvgpu_prof_ioctl_vab_flush(struct nvgpu_profiler_object *prof,
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struct nvgpu_profiler_vab_flush_state_args *arg)
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{
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int err;
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struct gk20a *g = prof->g;
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u64 *user_data = nvgpu_kzalloc(g, arg->buffer_size);
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err = g->ops.fb.vab.dump_and_clear(g, user_data, arg->buffer_size);
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if (err < 0) {
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goto fail;
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}
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if (copy_to_user((void __user *)(uintptr_t)arg->buffer_ptr,
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user_data, arg->buffer_size)) {
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nvgpu_err(g, "copy_to_user failed!");
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err = -EFAULT;
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}
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fail:
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nvgpu_kfree(g, user_data);
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return err;
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}
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#endif
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long nvgpu_prof_fops_ioctl(struct file *filp, unsigned int cmd,
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unsigned long arg)
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{
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@@ -848,13 +914,35 @@ long nvgpu_prof_fops_ioctl(struct file *filp, unsigned int cmd,
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(struct nvgpu_profiler_pma_stream_update_get_put_args *)buf);
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break;
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default:
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#if defined(CONFIG_NVGPU_NON_FUSA)
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err = nvgpu_next_prof_fops_ioctl(prof, cmd, (void *)buf);
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#else
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case NVGPU_PROFILER_IOCTL_VAB_RESERVE:
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_VAB_ENABLED)) {
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break;
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}
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err = nvgpu_prof_ioctl_vab_reserve(prof,
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(struct nvgpu_profiler_vab_reserve_args *)buf);
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break;
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case NVGPU_PROFILER_IOCTL_VAB_FLUSH_STATE:
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_VAB_ENABLED)) {
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break;
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}
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err = nvgpu_prof_ioctl_vab_flush(prof,
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(struct nvgpu_profiler_vab_flush_state_args *)buf);
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break;
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case NVGPU_PROFILER_IOCTL_VAB_RELEASE:
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_VAB_ENABLED)) {
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err = g->ops.fb.vab.release(g);
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}
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break;
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#endif
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default:
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nvgpu_err(g, "unrecognized profiler ioctl cmd: 0x%x", cmd);
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err = -ENOTTY;
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#endif
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break;
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}
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@@ -869,3 +957,4 @@ long nvgpu_prof_fops_ioctl(struct file *filp, unsigned int cmd,
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return err;
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2020-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@@ -20,10 +20,18 @@
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struct inode;
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struct file;
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#if defined(CONFIG_NVGPU_NON_FUSA)
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struct nvgpu_profiler_object;
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#endif
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int nvgpu_prof_dev_fops_open(struct inode *inode, struct file *filp);
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int nvgpu_prof_ctx_fops_open(struct inode *inode, struct file *filp);
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int nvgpu_prof_fops_release(struct inode *inode, struct file *filp);
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long nvgpu_prof_fops_ioctl(struct file *filp, unsigned int cmd,
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unsigned long arg);
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#if defined(CONFIG_NVGPU_NON_FUSA)
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int nvgpu_next_prof_fops_ioctl(struct nvgpu_profiler_object *prof,
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unsigned int cmd, void *buf);
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#endif
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#endif /* LINUX_IOCTL_PROF_H */
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@@ -1,137 +0,0 @@
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/*
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* GA10B Tegra Platform Interface
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*
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* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/uaccess.h>
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#include <uapi/linux/nvgpu.h>
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#include <nvgpu/profiler.h>
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#include <nvgpu/log.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/fb.h>
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#include "nvgpu_next_ioctl_prof.h"
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static u32 nvgpu_prof_vab_reserve_translate_vab_mode(struct gk20a *g, u32 mode)
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{
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u32 vab_mode = 0U;
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if (mode == NVGPU_PROFILER_VAB_RANGE_CHECKER_MODE_ACCESS) {
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vab_mode = NVGPU_VAB_MODE_ACCESS;
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} else if (mode == NVGPU_PROFILER_VAB_RANGE_CHECKER_MODE_DIRTY) {
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vab_mode = NVGPU_VAB_MODE_DIRTY;
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} else {
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nvgpu_err(g, "Unknown vab mode: 0x%x", mode);
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}
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return vab_mode;
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}
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static int nvgpu_prof_ioctl_vab_reserve(struct nvgpu_profiler_object *prof,
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struct nvgpu_profiler_vab_reserve_args *arg)
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{
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struct gk20a *g = prof->g;
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int err;
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u32 vab_mode = nvgpu_prof_vab_reserve_translate_vab_mode(g,
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(u32)arg->vab_mode);
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struct nvgpu_profiler_vab_range_checker *user_ckr =
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(struct nvgpu_profiler_vab_range_checker *)(uintptr_t)
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arg->range_checkers_ptr;
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struct nvgpu_vab_range_checker *ckr;
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if (arg->num_range_checkers == 0) {
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nvgpu_err(g, "Range checkers cannot be zero");
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return -EINVAL;
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}
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ckr = nvgpu_kzalloc(g, sizeof(struct nvgpu_vab_range_checker) *
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arg->num_range_checkers);
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if (copy_from_user(ckr, user_ckr,
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sizeof(struct nvgpu_vab_range_checker) *
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arg->num_range_checkers)) {
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return -EFAULT;
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}
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err = g->ops.fb.vab.reserve(g, vab_mode, arg->num_range_checkers, ckr);
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nvgpu_kfree(g, ckr);
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return err;
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}
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static int nvgpu_prof_ioctl_vab_flush(struct nvgpu_profiler_object *prof,
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struct nvgpu_profiler_vab_flush_state_args *arg)
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{
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int err;
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struct gk20a *g = prof->g;
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u64 *user_data = nvgpu_kzalloc(g, arg->buffer_size);
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err = g->ops.fb.vab.dump_and_clear(g, user_data, arg->buffer_size);
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if (err < 0) {
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goto fail;
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}
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if (copy_to_user((void __user *)(uintptr_t)arg->buffer_ptr,
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user_data, arg->buffer_size)) {
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nvgpu_err(g, "copy_to_user failed!");
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err = -EFAULT;
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}
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fail:
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nvgpu_kfree(g, user_data);
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return err;
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}
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int nvgpu_next_prof_fops_ioctl(struct nvgpu_profiler_object *prof,
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unsigned int cmd, void *buf)
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{
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int err = -ENOTTY;
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struct gk20a *g = prof->g;
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switch (cmd) {
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case NVGPU_PROFILER_IOCTL_VAB_RESERVE:
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_VAB_ENABLED)) {
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break;
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}
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err = nvgpu_prof_ioctl_vab_reserve(prof,
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(struct nvgpu_profiler_vab_reserve_args *)buf);
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break;
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case NVGPU_PROFILER_IOCTL_VAB_FLUSH_STATE:
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if (!nvgpu_is_enabled(g, NVGPU_SUPPORT_VAB_ENABLED)) {
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break;
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}
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err = nvgpu_prof_ioctl_vab_flush(prof,
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(struct nvgpu_profiler_vab_flush_state_args *)buf);
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break;
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case NVGPU_PROFILER_IOCTL_VAB_RELEASE:
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if (nvgpu_is_enabled(g, NVGPU_SUPPORT_VAB_ENABLED)) {
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err = g->ops.fb.vab.release(g);
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}
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break;
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default:
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nvgpu_err(g, "unrecognized profiler ioctl cmd: 0x%x", cmd);
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err = -ENOTTY;
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break;
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}
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return err;
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}
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@@ -1,24 +0,0 @@
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/*
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* Copyright (c) 2021, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef LINUX_NVGPU_NEXT_IOCTL_PROF_H
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#define LINUX_NVGPU_NEXT_IOCTL_PROF_H
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struct nvgpu_profiler_object;
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int nvgpu_next_prof_fops_ioctl(struct nvgpu_profiler_object *prof,
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unsigned int cmd, void *buf);
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#endif /* LINUX_NVGPU_NEXT_IOCTL_PROF_H */
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