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gpu: nvgpu: do not bind already active channels to TSG
If a channel is already scheduled as regular channel, we should not allow it to be marked as TSG since it will fail book keeping of number of active channels in a TSG This way we can force to bind the channels first and then only make them active Also, remove duplicate function declaration added during branch merge and one unnecessary comparison with zero Bug 1470692 Change-Id: I88f9678919e4b76de472c6dda21e4537520241c4 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/497903 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
committed by
Dan Willemsen
parent
27b94dfafd
commit
f9cb1a93d1
@@ -1779,7 +1779,7 @@ static int gk20a_fifo_update_runlist_locked(struct gk20a *g, u32 runlist_id,
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if (test_and_set_bit(hw_chid,
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runlist->active_channels) == 1)
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return 0;
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if (tsg && ++tsg->num_active_channels > 0)
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if (tsg && ++tsg->num_active_channels)
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set_bit(f->channel[hw_chid].tsgid,
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runlist->active_tsgs);
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} else {
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@@ -27,13 +27,26 @@
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static void gk20a_tsg_release(struct kref *ref);
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static void gk20a_tsg_release(struct kref *ref);
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bool gk20a_is_channel_marked_as_tsg(struct channel_gk20a *ch)
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{
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return !(ch->tsgid == NVGPU_INVALID_TSG_ID);
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}
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static bool gk20a_is_channel_active(struct gk20a *g, struct channel_gk20a *ch)
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{
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struct fifo_gk20a *f = &g->fifo;
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struct fifo_runlist_info_gk20a *runlist;
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int i;
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for (i = 0; i < f->max_runlists; ++i) {
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runlist = &f->runlist_info[i];
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if (test_bit(ch->hw_chid, runlist->active_channels))
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return true;
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}
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return false;
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}
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/*
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* API to mark channel as part of TSG
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*
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@@ -50,6 +63,12 @@ static int gk20a_tsg_bind_channel(struct tsg_gk20a *tsg, int ch_fd)
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return -EINVAL;
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}
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/* channel cannot be bound to TSG if it is already active */
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if (gk20a_is_channel_active(tsg->g, ch)) {
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fput(f);
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return -EINVAL;
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}
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ch->tsgid = tsg->tsgid;
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mutex_lock(&tsg->ch_list_lock);
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