gpu: nvgpu: vgpu: add tsg release command

gv11b needs tsg release callback to release CE method buffer.

Bug 2022929

Change-Id: I32e27a5fa49eb61b9c2fc72ea32034191a9be48e
Signed-off-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1611631
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Fleury <tfleury@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aparna Das <aparnad@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

drivers/gpu/nvgpu/common/linux/vgpu/fifo_vgpu.h

@@ -50,6 +50,7 @@ int vgpu_fifo_force_reset_ch(struct channel_gk20a *ch,
 					u32 err_code, bool verbose);
 u32 vgpu_fifo_default_timeslice_us(struct gk20a *g);
 int vgpu_tsg_open(struct tsg_gk20a *tsg);
+void vgpu_tsg_release(struct tsg_gk20a *tsg);
 int vgpu_tsg_bind_channel(struct tsg_gk20a *tsg,
 			struct channel_gk20a *ch);
 int vgpu_tsg_unbind_channel(struct channel_gk20a *ch);

drivers/gpu/nvgpu/common/linux/vgpu/gv11b/vgpu_hal_gv11b.c

@@ -355,6 +355,7 @@ static const struct gpu_ops vgpu_gv11b_ops = {
 		.set_runlist_interleave = vgpu_fifo_set_runlist_interleave,
 		.tsg_set_timeslice = vgpu_tsg_set_timeslice,
 		.tsg_open = vgpu_tsg_open,
+		.tsg_release = vgpu_tsg_release,
 		.force_reset_ch = vgpu_fifo_force_reset_ch,
 		.engine_enum_from_type = gp10b_fifo_engine_enum_from_type,
 		.device_info_data_parse = gp10b_device_info_data_parse,

drivers/gpu/nvgpu/common/linux/vgpu/tsg_vgpu.c

@@ -28,7 +28,7 @@
 int vgpu_tsg_open(struct tsg_gk20a *tsg)
 {
 	struct tegra_vgpu_cmd_msg msg = {};
-	struct tegra_vgpu_tsg_open_params *p =
+	struct tegra_vgpu_tsg_open_rel_params *p =
 				&msg.params.tsg_open;
 	int err;
 
@@ -47,6 +47,26 @@ int vgpu_tsg_open(struct tsg_gk20a *tsg)
 	return err;
 }
 
+void vgpu_tsg_release(struct tsg_gk20a *tsg)
+{
+	struct tegra_vgpu_cmd_msg msg = {};
+	struct tegra_vgpu_tsg_open_rel_params *p =
+				&msg.params.tsg_release;
+	int err;
+
+	gk20a_dbg_fn("");
+
+	msg.cmd = TEGRA_VGPU_CMD_TSG_RELEASE;
+	msg.handle = vgpu_get_handle(tsg->g);
+	p->tsg_id = tsg->tsgid;
+	err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
+	err = err ? err : msg.ret;
+	if (err) {
+		nvgpu_err(tsg->g,
+			"vgpu_tsg_release failed, tsgid %d", tsg->tsgid);
+	}
+}
+
 int vgpu_enable_tsg(struct tsg_gk20a *tsg)
 {
 	struct gk20a *g = tsg->g;

drivers/gpu/nvgpu/gk20a/gk20a.h

@@ -552,6 +552,7 @@ struct gpu_ops {
 				struct channel_gk20a *ch);
 		int (*tsg_unbind_channel)(struct channel_gk20a *ch);
 		int (*tsg_open)(struct tsg_gk20a *tsg);
+		void (*tsg_release)(struct tsg_gk20a *tsg);
 		u32 (*eng_runlist_base_size)(void);
 		int (*init_engine_info)(struct fifo_gk20a *f);
 		u32 (*runlist_entry_size)(void);

drivers/gpu/nvgpu/gk20a/tsg_gk20a.c

@@ -315,6 +315,9 @@ void gk20a_tsg_release(struct nvgpu_ref *ref)
 	struct gk20a *g = tsg->g;
 	struct gk20a_event_id_data *event_id_data, *event_id_data_temp;
 
+	if (g->ops.fifo.tsg_release)
+		g->ops.fifo.tsg_release(tsg);
+
 	if (tsg->tsg_gr_ctx) {
 		gr_gk20a_free_tsg_gr_ctx(tsg);
 		tsg->tsg_gr_ctx = NULL;

include/linux/tegra_vgpu.h

@@ -110,6 +110,7 @@ enum {
 	TEGRA_VGPU_CMD_PROF_MGT = 72,
 	TEGRA_VGPU_CMD_PERFBUF_MGT = 73,
 	TEGRA_VGPU_CMD_GET_TIMESTAMPS_ZIPPER = 74,
+	TEGRA_VGPU_CMD_TSG_RELEASE = 75,
 };
 
 struct tegra_vgpu_connect_params {
@@ -384,7 +385,7 @@ struct tegra_vgpu_tsg_timeslice_params {
 	u32 timeslice_us;
 };
 
-struct tegra_vgpu_tsg_open_params {
+struct tegra_vgpu_tsg_open_rel_params {
 	u32 tsg_id;
 };
 
@@ -562,7 +563,8 @@ struct tegra_vgpu_cmd_msg {
 		struct tegra_vgpu_channel_bind_gr_ctx_params ch_bind_gr_ctx;
 		struct tegra_vgpu_tsg_bind_gr_ctx_params tsg_bind_gr_ctx;
 		struct tegra_vgpu_tsg_bind_unbind_channel_params tsg_bind_unbind_channel;
-		struct tegra_vgpu_tsg_open_params tsg_open;
+		struct tegra_vgpu_tsg_open_rel_params tsg_open;
+		struct tegra_vgpu_tsg_open_rel_params tsg_release;
 		struct tegra_vgpu_tsg_preempt_params tsg_preempt;
 		struct tegra_vgpu_tsg_timeslice_params tsg_timeslice;
 		struct tegra_vgpu_tsg_runlist_interleave_params tsg_interleave;