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gpu: nvgpu: remove cyclic dependency between gr and ecc
Removed gr dependency on ecc by moving ecc init/remove support calls to nvgpu_init. With this, only dependency from ecc to gr present. Added following parameter in struct nvgpu_ecc to check/update ecc initialization status: bool initialized; JIRA NVGPU-3212 Change-Id: I04611175cbd959cb8082e63c30214266f5d5b731 Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2107955 GVS: Gerrit_Virtual_Submit Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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@@ -344,12 +344,18 @@ void nvgpu_ecc_free(struct gk20a *g)
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nvgpu_kfree(g, ecc->fbpa.fbpa_ecc_ded_err_count);
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(void)memset(ecc, 0, sizeof(*ecc));
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ecc->initialized = false;
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}
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int nvgpu_ecc_init_support(struct gk20a *g)
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{
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int err;
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if (g->ecc.initialized) {
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return 0;
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}
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if (g->ops.gr.ecc.init == NULL) {
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return 0;
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}
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@@ -366,6 +372,8 @@ int nvgpu_ecc_init_support(struct gk20a *g)
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return err;
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}
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g->ecc.initialized = true;
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return 0;
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}
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@@ -274,7 +274,6 @@ static void gr_remove_support(struct gk20a *g)
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nvgpu_gr_falcon_remove_support(g, gr->falcon);
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gr->falcon = NULL;
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nvgpu_ecc_remove_support(g);
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nvgpu_gr_zbc_deinit(g, gr->zbc);
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nvgpu_gr_zcull_deinit(g, gr->zcull);
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nvgpu_gr_obj_ctx_deinit(g, gr->golden_image);
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@@ -459,11 +458,6 @@ static int gr_init_setup_sw(struct gk20a *g)
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gr->remove_support = gr_remove_support;
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gr->sw_ready = true;
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err = nvgpu_ecc_init_support(g);
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if (err != 0) {
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goto clean_up;
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}
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nvgpu_log_fn(g, "done");
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return 0;
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@@ -35,6 +35,7 @@
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#include <nvgpu/gmmu.h>
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#include <nvgpu/ltc.h>
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#include <nvgpu/cbc.h>
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#include <nvgpu/ecc.h>
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#include <nvgpu/vidmem.h>
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#include <nvgpu/mm.h>
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#include <nvgpu/soc.h>
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@@ -377,6 +378,13 @@ int gk20a_finalize_poweron(struct gk20a *g)
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goto done;
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}
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err = nvgpu_ecc_init_support(g);
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if (err != 0) {
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nvgpu_err(g, "failed to init ecc");
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nvgpu_mutex_release(&g->tpc_pg_lock);
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goto done;
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}
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nvgpu_mutex_release(&g->tpc_pg_lock);
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if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) {
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@@ -582,6 +590,8 @@ static void gk20a_free_cb(struct nvgpu_ref *refcount)
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nvgpu_cbc_remove_support(g);
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nvgpu_ecc_remove_support(g);
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if (g->remove_support != NULL) {
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g->remove_support(g);
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}
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@@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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@@ -118,6 +118,7 @@ struct nvgpu_ecc {
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struct nvgpu_list_node stats_list;
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int stats_count;
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bool initialized;
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};
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int nvgpu_ecc_counter_init_per_tpc(struct gk20a *g,
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