nv-tegra-mirror/linux-nvgpu
1
0
Fork 0
mirror of git://nv-tegra.nvidia.com/linux-nvgpu.git synced 2025-12-22 17:36:20 +03:00
Code Issues Packages Projects Releases Wiki Activity

gpu: nvgpu: Updated with generator headers

Browse Source 
Add pmu_idle_mask_1, pmu_idle_mask_2 and pmu_idle_mask_2_supp

Bug 2833620

Change-Id: Icceb99b48a227d32653fd9fbc3da9e27065e9fe2
Signed-off-by: David Ung <davidu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2334219
(cherry picked from commit b7fb70db75)
Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2351904
Reviewed-by: automaticguardword <automaticguardword@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Amulya Yarlagadda <ayarlagadda@nvidia.com>
GVS: Gerrit_Virtual_Submit
Tested-by: Amulya Yarlagadda <ayarlagadda@nvidia.com>
This commit is contained in:
David Ung
2020-04-24 17:13:11 -07:00
committed by Amulya Yarlagadda
parent 5f9cd1bca5
commit fead67a6bf
4 changed files with 24 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/nvgpu/include/nvgpu/hw/gk20a/hw_pwr_gk20a.h
View File

@@ -632,6 +632,10 @@ static inline u32 pwr_pmu_idle_mask_ce_2_enabled_f(void)
{
return 0x200000U;
}
static inline u32 pwr_pmu_idle_mask_1_r(u32 i)
{
return 0x0010aa34U + i*8U;
}
static inline u32 pwr_pmu_idle_count_r(u32 i)
{
return 0x0010a508U + i*16U;

4
drivers/gpu/nvgpu/include/nvgpu/hw/gm20b/hw_pwr_gm20b.h
View File

@@ -676,6 +676,10 @@ static inline u32 pwr_pmu_idle_mask_ce_2_enabled_f(void)
{
return 0x200000U;
}
static inline u32 pwr_pmu_idle_mask_1_r(u32 i)
{
return 0x0010aa34U + i*8U;
}
static inline u32 pwr_pmu_idle_count_r(u32 i)
{
return 0x0010a508U + i*16U;

4
drivers/gpu/nvgpu/include/nvgpu/hw/gp10b/hw_pwr_gp10b.h
View File

@@ -680,6 +680,10 @@ static inline u32 pwr_pmu_idle_mask_ce_2_enabled_f(void)
{
return 0x200000U;
}
static inline u32 pwr_pmu_idle_mask_1_r(u32 i)
{
return 0x0010aa34U + i*8U;
}
static inline u32 pwr_pmu_idle_count_r(u32 i)
{
return 0x0010a508U + i*16U;

12
drivers/gpu/nvgpu/include/nvgpu/hw/gv11b/hw_pwr_gv11b.h
View File

@@ -840,6 +840,14 @@ static inline u32 pwr_pmu_idle_mask_ce_2_enabled_f(void)
{
return 0x200000U;
}
static inline u32 pwr_pmu_idle_mask_1_r(u32 i)
{
return 0x0010aa34U + i*8U;
}
static inline u32 pwr_pmu_idle_mask_2_r(u32 i)
{
return 0x0010a840U + i*4U;
}
static inline u32 pwr_pmu_idle_count_r(u32 i)
{
return 0x0010a508U + i*16U;
@@ -936,6 +944,10 @@ static inline u32 pwr_pmu_idle_mask_1_supp_r(u32 i)
{
return 0x0010a9f4U + i*8U;
}
static inline u32 pwr_pmu_idle_mask_2_supp_r(u32 i)
{
return 0x0010a690U + i*4U;
}
static inline u32 pwr_pmu_idle_ctrl_supp_r(u32 i)
{
return 0x0010aa30U + i*8U;