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gpu: nvgpu: hwpm broadcast register support

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Add support for hwpm broadcast registers (ltc and lts)

Bug 1648200

Change-Id: I2aa4e6c0991abaa94b0f58354a826f626f1d43a2
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1131363
(cherry picked from commit 383d195dabed76ecc50bb2bd355d6180bcda082a)
Reviewed-on: http://git-master/r/1133629
(cherry picked from commit 725d02e2690c96fbfa5f49ade550442de5961e82)
Reviewed-on: http://git-master/r/1127750
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
This commit is contained in:
Peter Daifuku
2016-04-15 18:16:21 -07:00
committed by Deepak Nibade
parent 1f225fa731
commit fed910d75f
1 changed files with 20 additions and 0 deletions
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20
drivers/gpu/nvgpu/gp10b/hw_ltc_gp10b.h
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@@ -50,6 +50,26 @@
#ifndef _hw_ltc_gp10b_h_
#define _hw_ltc_gp10b_h_
static inline u32 ltc_pltcg_base_v(void)
{
return 0x00140000;
}
static inline u32 ltc_pltcg_extent_v(void)
{
return 0x0017ffff;
}
static inline u32 ltc_ltc0_ltss_v(void)
{
return 0x00140200;
}
static inline u32 ltc_ltc0_lts0_v(void)
{
return 0x00140400;
}
static inline u32 ltc_ltcs_ltss_v(void)
{
return 0x0017e200;
}
static inline u32 ltc_ltcs_lts0_cbc_ctrl1_r(void)
{
return 0x0014046c;